Jinn-Shyan Wang

An AND-type match-line scheme for high-performance energy-efficient content addressable memories

Hung-Yu Li, Chia-Cheng Chen, Jinn-Shyan Wang, 2006, IEEE Journal of Solid-State Circuits.

Design techniques for single-low-V/sub DD/ CMOS systems

Hung-Yu Li, Jinn-Shyan Wang, Chingwei Yeh, 2005, IEEE Journal of Solid-State Circuits.

The CMOS carry-forward adders

Jinn-Shyan Wang, Chingwei Yeh, Chung-Hsun Huang, 2004, IEEE Journal of Solid-State Circuits.

A low-power half-delay-line fast skew-compensation circuit

Jinn-Shyan Wang, Yi-Ming Wang, 2004, IEEE Journal of Solid-State Circuits.