Kenji Maio

Digital analog-relaying system with compensator

Tsuneta Sudo, Kenji Maio, 1978 .

A 256 bit 12L RAM with a high‐voltage analog circuit

Minoru Nagata, Takahiro Okabe, Keizo Matsumoto, 1983 .

A 10b 3MSample/s CMOS cyclic ADC

Masao Hotta, Akihiro Kitagawa, Toshiro Tsukada, 1995, Proceedings ISSCC '95 - International Solid-State Circuits Conference.

A 10-bit 20-MHz two-step parallel A/D converter with internal S/H

Masao Hotta, Kenji Maio, Toshihiko Shimizu, 1989 .

Kuehlapparat-control arrangement

Norio Yokozawa, Kenji Maio, Fumiyuki Inose, 1974 .

High-resolution and high-stability electromagnetic-deflection control system for EB lithography system

Akira Fujii, Hajime Hayakawa, Koji Nagata, 2001, SPIE Advanced Lithography.

Low-power, small-area 10 bit D/A converter for cell-based IC

T. Matsuura, Kenji Maio, M. Otsuka, 1995, 1995 IEEE Symposium on Low Power Electronics. Digest of Technical Papers.

+3 V/-3 V Operation 1.2 Gbps Write Driver for Hard Disk Drives

Yasuyuki Okuma, Hiroyasu Yoshizawa, Kenji Maio, 2004 .

A 1.2 Gbps SOI-BiCMOS write driver for hard disk drives

Hiroyasu Yoshizawa, Yoichiro Kobayashi, Kenji Maio, 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

An untrimmed monolithic 14‐bit D/A converter

Masao Hotta, Minoru Nagata, Norio Yokozawa, 1982 .

Automatic tuning of RC filters and fast automatic gain control for CMOS low-IF transceiver

Takeshi Doi, Kenji Maio, Y. Shibahara, 2003, Proceedings of the IEEE 2003 Custom Integrated Circuits Conference, 2003..