Choongyeun Cho

发表

A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology

Jean-Olivier Plouchart, Sangyeun Cho, Choongyeun Cho, 2007, 8th International Symposium on Quality Electronic Design (ISQED'07).

Early prediction of product performance and yield via technology benchmark

Sangyeun Cho, Choongyeun Cho, Daeik D. Kim, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Symmetric Vertical Parallel Plate Capacitors for On-Chip RF Circuits in 65-nm SOI Technology

Choongyeun Cho, Daeik D. Kim, Jonghae Kim, 2007, IEEE Electron Device Letters.

Analytic performance bounds on SAR-image target recognition using physics-based signatures

Jeffrey H. Shapiro, Choongyeun Cho, Chen-Pang Yeang, 2001, SPIE Defense + Commercial Sensing.

Integrated Inductor Actively Engaging Metal Filling Rules

Dimitrios Peroulis, Byunghoo Jung, Choongyeun Cho, 2007, 2007 IEEE Custom Integrated Circuits Conference.

Scalable statistical measurement and estimation of a mmWave CML static divider sensitivity in 65nm SOI CMOS

Choongyeun Cho, Jonghae Kim, D.D. Kim, 2008, 2008 IEEE Radio Frequency Integrated Circuits Symposium.

Large-Scale Video Classification with Feature Space Augmentation coupled with Learned Label Relations and Ensembling

Choongyeun Cho, Mojtaba Solgi, Lee James, 2018, ECCV Workshops.

Anomaly detection and compensation for hyperspectral imagery

Choongyeun Cho, Choongyeun Cho, 2005 .

A Low-Power mmWave CML Prescaler in 65nm SOI CMOS Technology

Choongyeun Cho, Jonghae Kim, Daihyun Lim, 2008, 2008 IEEE Compound Semiconductor Integrated Circuits Symposium.

SOI CMOS Technology with 360GHz fT NFET, 260GHz fT PFET, and Record Circuit Performance for Millimeter-Wave Digital and Analog System-on-Chip Applications

B. Jagannathan, Choongyeun Cho, Jonghae Kim, 2007, 2007 IEEE Symposium on VLSI Technology.

Wideband mmWave CML static divider in 65nm SOI CMOS technology

Jean-Olivier Plouchart, Choongyeun Cho, Daeik D. Kim, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Performance analysis for synthetic aperture radar target classification

Choongyeun Cho, 2001 .

Performance andYield Optimization ofmm-WavePLLFront-End in 65nmSOICMOS

Jean-Olivier Plouchart, Choongyeun Cho, Jonghae Kim, 2007 .

Forensic prescreening system using coded aperture snapshot spectral imager

Michael Anthony Isnardi, Sek M. Chai, Choongyeun Cho, 2014, Sensing Technologies + Applications.

A 94GHz Locking Hysteresis-Assisted and Tunable CML Static Divider in 65nm SOI CMOS

Choongyeun Cho, Daeik D. Kim, Jonghae Kim, 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

Analog parallelism in ring-based VCOs

Choongyeun Cho, Daeik D. Kim, Jonghae Kim, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Performance and Yield Optimization of mm-Wave PLL Front-End in 65nm SOI CMOS

Choongyeun Cho, Jonghae Kim, Daihyun Lim, 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

A 75GHz PLL Front-End Integration in 65nm SOI CMOS Technology

Choongyeun Cho, Jonghae Kim, Daihyun Lim, 2007, 2007 IEEE Symposium on VLSI Circuits.

Toward target recognition from synthetic aperture radar imagery using electromagnetics-based signatures

Jeffrey H. Shapiro, Choongyeun Cho, Chen-Pang Yeang, 2003 .

The process variability of a V-band LC-VCO in 65nm SOI CMOS

Choongyeun Cho, Jonghae Kim, D.D. Kim, 2008, 2008 IEEE Radio Frequency Integrated Circuits Symposium.

Decomposition and Analysis of Process Variability Using Constrained Principal Component Analysis

Sangyeun Cho, Choongyeun Cho, Jonghae Kim, 2008, IEEE Transactions on Semiconductor Manufacturing.

An array of 4 complementary LC-VCOs with 51.4% W-Band coverage in 32nm SOI CMOS

Jean-Olivier Plouchart, Choongyeun Cho, Daeik D. Kim, 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

Manufacturable Parasitic-Aware Circuit-Level FETs in 65-nm SOI CMOS Technology

Choongyeun Cho, Jonghae Kim, Daeik Kim, 2007, IEEE Electron Device Letters.

In-Situ and At-Speed Modeling and Characterization of Logic Interconnect Device Considering Front-End/Back-End Interaction

Choongyeun Cho, Daeik D. Kim, Jonghae Kim, 2009, 2009 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

A 70GHz Manufacturable Complementary LC-VCO with 6.14GHz Tuning Range in 65nm SOI CMOS

Jean-Olivier Plouchart, Choongyeun Cho, Daeik D. Kim, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

CMOS Mixed-Signal Circuit Process Variation Sensitivity Characterization for Yield Improvement

Jean-Olivier Plouchart, Choongyeun Cho, Daeik D. Kim, 2006, IEEE Custom Integrated Circuits Conference 2006.

Cell Broadband Engine performance and yield benchmark in 65nm SOI CMOS with spatial, temporal and parametric process variability model

Choongyeun Cho, Jonghae Kim, D.D. Kim, 2008, 2008 IEEE Asian Solid-State Circuits Conference.

65nm SOI CMOS SoC Technology for Low-Power mmWave and RF Platform

Choongyeun Cho, Jonghae Kim, J.-O. Plouchart, 2008, 2008 IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

Statistical Framework for Technology-Model-Product Co-Design and Convergence

Jean-Olivier Plouchart, Choongyeun Cho, Daeik D. Kim, 2007, 2007 44th ACM/IEEE Design Automation Conference.

Performance Variability of a 90GHz Static CML Frequency Divider in 65nm SOI CMOS

Jean-Olivier Plouchart, Duane S. Boning, Choongyeun Cho, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

A 1.2V 15.6mW 81GHz 2:1 Static CML Frequency Divider with a Band-Pass Load in a 90nm SOI CMOS Technology

Choongyeun Cho, Jonghae Kim, R. Trzcinski, 2007, 2007 IEEE Compound Semiconductor Integrated Circuits Symposium.