Andrea Fenaroli

21.1 A 1.7GHz MDLL-based fractional-N frequency synthesizer with 1.4ps RMS integrated jitter and 3mW power using a 1b TDC

Giovanni Marucci, Andrea Fenaroli, Giovanni Marzin, 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

Background adaptive linearization of high-speed digital-to-analog Converters

Andrea Fenaroli, Salvatore Levantino, Carlo Samori, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A spur cancellation technique for MDLL-based frequency synthesizers

Giovanni Marucci, Andrea Fenaroli, Giovanni Marzin, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

A 1.7 GHz Fractional-N Frequency Synthesizer Based on a Multiplying Delay-Locked Loop

Giovanni Marucci, Andrea Fenaroli, Giovanni Marzin, 2015, IEEE Journal of Solid-State Circuits.