Kalapi Roy

A timing driven N-way chip and multi-chip partitioner

Carl Sechen, Kalapi Roy, 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).

Description Language for a Neural Network Architecture

S. DasGupta, Kalapi Roy, 1989, IAS.

A timing-driven multi-way partitioning system for integrated circuits and multi-chip systems

Kalapi Roy, 1994 .

A Timing-Driven Partitioning System for Multiple FPGAs

Carl Sechen, Kalapi Roy, C. Sechen, 1996, VLSI Design.