Shinobu Nagayama

发表

Simple Hybrid Scaling-Free CORDIC Solution for FPGAs

Leonid Moroz, Shinobu Nagayama, Taras Mykytiv, 2014, Int. J. Reconfigurable Comput..

Representations of logic functions using QRMDDs

Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, 2002, Proceedings 32nd IEEE International Symposium on Multiple-Valued Logic.

On Optimum Linear Decomposition of Symmetric Index Generation Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2020, 2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL).

A Systolic Algorithm for the Quadratic Assignment Problem and its FPGA Implementation

Shinobu Nagayama, Yoshihiro Kimura, Shin'ichi Wakabayashi, 2007, 2007 International Conference on Field-Programmable Technology.

RC-003 An Approximate Regular Expression Matching Algorithm for High-Speed Text Search and Its FPGA Implementation

Shinobu Nagayama, Shin'ichi Wakabayashi, Yuichiro Utan, 2010 .

Properties of Multiple-Valued Partition Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2020, 2020 IEEE 50th International Symposium on Multiple-Valued Logic (ISMVL).

An Exact Optimization Method Using ZDDs for Linear Decomposition of Index Generation Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2018, 2018 IEEE 48th International Symposium on Multiple-Valued Logic (ISMVL).

A Proposal of QRM-MLD for Reduced Complexity of MLD to Detect MIMO Signals in Fading Environment

Shinobu Nagayama, Takeshi Hattori, 2006, IEEE Vehicular Technology Conference.

An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating

Shinobu Nagayama, Shin'ichi Wakabayashi, Yoichi Wakaba, 2014, IPSJ Trans. Syst. LSI Des. Methodol..

A Systematic Design Method for Two-Variable Numeric Function Generators Using Multiple-Valued Decision Diagrams

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2010, IEICE Trans. Inf. Syst..

On the minimization of average path lengths for heterogeneous MDDs [multi-valued decision diagrams]

Shinobu Nagayama, Tsutomu Sasao, 2004, Proceedings. 34th International Symposium on Multiple-Valued Logic.

An FPGA-based text search engine for approximate regular expression matching

Shinobu Nagayama, Shin'ichi Wakabayashi, Yuichiro Utan, 2010, 2010 International Conference on Field-Programmable Technology.

Table Reference-Based Acceleration of a Lithography Hotspot Detection Method Based on Approximate String Search

Shinobu Nagayama, Masato Inagi, Shin'ichi Wakabayashi, 2017 .

A Flexible and Compact Regular Expression Matching Engine Using Partial Reconfiguration for FPGA

Shinobu Nagayama, Shin'ichi Wakabayashi, Yoichi Wakaba, 2013, 2013 Euromicro Conference on Digital System Design.

Efficient FPGA-based Hardware Algorithms for Approximate String Matching

Shinobu Nagayama, Shin'ichi Wakabayashi, Sadatoshi Mikami, 2008 .

A Systolic String Matching Algorithm for High-Speed Recognition of a Restricted Regular Set

Shinobu Nagayama, Shin'ichi Wakabayashi, Yosuke Kawanaka, 2009, ERSA.

EVMDD-Based Analysis and Diagnosis Methods of Multi-State Systems with Multi-State Components

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2014, J. Multiple Valued Log. Soft Comput..

Analysis of Multi-state Systems with Multi-state Components Using EVMDDs

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2012, 2012 IEEE 42nd International Symposium on Multiple-Valued Logic.

Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2007, 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007).

Representations of Elementary Functions Using Binary Moment Diagrams

Shinobu Nagayama, Tsutomu Sasao, 2006, 36th International Symposium on Multiple-Valued Logic (ISMVL'06).

System Probability Distribution Modeling Using MDDs

Stephen A. Szygenda, Shinobu Nagayama, Theodore W. Manikas, 2014, 2014 IEEE 44th International Symposium on Multiple-Valued Logic.

An Efficient Hardware Matching Engine for Regular Expression with Nested Kleene Operators

Shinobu Nagayama, Shin'ichi Wakabayashi, Yoichi Wakaba, 2011, 2011 21st International Conference on Field Programmable Logic and Applications.

An Efficient Heuristic for Linear Decomposition of Index Generation Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2016, 2016 IEEE 46th International Symposium on Multiple-Valued Logic (ISMVL).

Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2007 .

Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2010, 2010 40th IEEE International Symposium on Multiple-Valued Logic.

Minimization of the Number of Edges in an EVMDD by Variable Grouping for Fast Analysis of Multi-State Systems

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2013, 2013 IEEE 43rd International Symposium on Multiple-Valued Logic.

On the optimization of heterogeneous MDDs

Shinobu Nagayama, Tsutomu Sasao, S. Nagayama, 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Complexities of Graph-Based Representations for Elementary Functions

Shinobu Nagayama, Tsutomu Sasao, Tsutomu Sasao, 2009, IEEE Transactions on Computers.

Programmable Numerical Function Generators for Two-Variable Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

Compact representations of logic functions using heterogeneous MDDs

Shinobu Nagayama, Tsutomu Sasao, 2003, 33rd International Symposium on Multiple-Valued Logic, 2003. Proceedings..

Numerical Function Generators Using Edge-Valued Binary Decision Diagrams

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2007, 2007 Asia and South Pacific Design Automation Conference.

A Proposal of RM QRM-MLD with Independent Adaptive Control of Surviving Symbol Replica Candidates for MIMO-OFDM System

Shinobu Nagayama, Takeshi Hattori, 2007, 2007 IEEE 66th Vehicular Technology Conference.

A Balanced Decision Tree Based Heuristic for Linear Decomposition of Index Generation Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2017, IEICE Trans. Inf. Syst..

Piecewise Arithmetic Expressions of Numeric Functions and Their Application to Design of Numeric Function Generators

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2014, J. Multiple Valued Log. Soft Comput..

Numerical Function Generators Using LUT Cascades

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2007, IEEE Transactions on Computers.

An Approximate Nearest Neighbor Search Algorithm Using Distance-Based Hashing

Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi, 2018, DEXA.

On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2014, IEICE Trans. Inf. Syst..

Fast Regular Expression Matching Based On Dual Glushkov NFA

Hiroki Arimura, Shinobu Nagayama, Norihito Yasuda, 2014, Stringology.

Programmable numerical function generators: architectures and synthesis method

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2005, International Conference on Field Programmable Logic and Applications, 2005..

Numerical function generators using bilinear interpolation

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2008, 2008 International Conference on Field Programmable Logic and Applications.

Floating-Point Numerical Function Generators Using EVMDDs for Monotone Elementary Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2009, 2009 39th International Symposium on Multiple-Valued Logic.

Minimization of memory size for heterogeneous MDDs

Shinobu Nagayama, Tsutomu Sasao, 2004, ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753).

An efficient FPGA implementation of Mahalanobis distance-based outlier detection for streaming data

Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi, 2016, 2016 International Conference on Field-Programmable Technology (FPT).

An ILP-Based Optimal Circuit Mapping Method for PLDs

Shinobu Nagayama, Keisuke Inoue, Shin'ichi Wakabayashi, 2014, 2014 IEEE International Parallel & Distributed Processing Symposium Workshops.

Exact and Heuristic Minimization of the Average Path Length in Decision Diagrams

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2005, J. Multiple Valued Log. Soft Comput..

Regular Expression Pattern Matching Hardware for Realizing Iteration of Strings Using Quantifiers

Shinobu Nagayama, Shin'ichi Wakabayashi, Yoichi Wakaba, 2010 .

Novel Feature Vectors Considering Distances between Wires for Lithography Hotspot Detection

Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi, 2018, 2018 21st Euromicro Conference on Digital System Design (DSD).

Programmable Architectures and Design Methods for Two-Variable Numeric Function Generators

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2010, IPSJ Trans. Syst. LSI Des. Methodol..

A GPGPU Implementation of Approximate String Matching with Regular Expression Operators and Comparison with Its FPGA Implementation

Shinobu Nagayama, Shin'ichi Wakabayashi, Yuichiro Utan, 2012 .

Programmable numerical function generators based on quadratic approximation: architecture and synthesis method

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2006, Asia and South Pacific Conference on Design Automation, 2006..

A Hardware Algorithm for the Quadratic Assignment Problem Based on Tabu Search Using FPGAs

Shinobu Nagayama, Yoshihiro Kimura, Shin'ichi Wakabayashi, 2007 .

Numeric Function Generators Using Piecewise Arithmetic Expressions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2011, 2011 41st IEEE International Symposium on Multiple-Valued Logic.

Analysis Methods of Multi-state Systems Partially Having Dependent Components Using Multiple-Valued Decision Diagrams

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2014, 2014 IEEE 44th International Symposium on Multiple-Valued Logic.

A Multithreaded Parallel Global Routing Method with Overlapped Routing Regions

Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi, 2013, 2013 Euromicro Conference on Digital System Design.

Representations of Two-Variable Elementary Functions Using EVMDDs and their Applications to Function Generators

Shinobu Nagayama, Tsutomu Sasao, Tsutomu Sasao, 2008, 38th International Symposium on Multiple Valued Logic (ismvl 2008).

A Parallel Simulated Annealing Algorithm for LSI Floorplanning Running on Multicore Processors

Tomoaki Sato, Shinobu Nagayama, Shin'ichi Wakabayashi, 2009 .

Hardware Accelerators for Regular Expression Matching and Approximate String Matching

Shinobu Nagayama, Shin'ichi Wakabayashi, Sadatoshi Mikami, 2009 .

A Design Method for Programmable Two-Variable Discrete Function Generators Using Spline and Bilinear Interpolations

Shinobu Nagayama, Shin'ichi Wakabayashi, Yoichi Wakaba, 2011, 2011 14th Euromicro Conference on Digital System Design.

An Exact Optimization Algorithm for Linear Decomposition of Index Generation Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2017, 2017 IEEE 47th International Symposium on Multiple-Valued Logic (ISMVL).

Edge Reduction for EVMDDs to Speed Up Analysis of Multi-state Systems

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2015, 2015 IEEE International Symposium on Multiple-Valued Logic.

Compact Numerical Function Generators Based on Quadratic Approximation: Architecture and Synthesis Method

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2006, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A Nearest Neighbor Search Engine Using Distance-Based Hashing

Shinobu Nagayama, Toshitaka Ito, Shin'ichi Wakabayashi, 2018, 2018 International Conference on Field-Programmable Technology (FPT).

Representations of Elementary Functions Using Edge-Valued MDDs

Shinobu Nagayama, Tsutomu Sasao, 2007, 37th International Symposium on Multiple-Valued Logic (ISMVL'07).

A Dynamic Programming Based Method for Optimum Linear Decomposition of Index Generation Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2019, 2019 IEEE 49th International Symposium on Multiple-Valued Logic (ISMVL).

A Parallel Multistage Metaheuristic Algorithm for VLSI Floorplanning

Shinobu Nagayama, Shin'ichi Wakabayashi, Takayoshi Shimazu, 2007, PDPTA.

A systolic regular expression pattern matching engine and its application to network intrusion detection

Shinobu Nagayama, Shin'ichi Wakabayashi, Yosuke Kawanaka, 2008, 2008 International Conference on Field-Programmable Technology.

On the Minimization of Longest Path Length for Decision Diagrams

Shinobu Nagayama, Tsutomu Sasao, 2004 .

FPGA implementation of tabu search for the quadratic assignment problem

Shinobu Nagayama, Yoshihiro Kimura, Shin'ichi Wakabayashi, 2006, 2006 IEEE International Conference on Field Programmable Technology.

Design Method for Numerical Function Generators Using Recursive Segmentation and EVBDDs

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2007, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Improvement in the Quality of Solutions of a Heuristic Linear Decomposer for Index Generation Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2021, 2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL).

Compact BDD Representations for Multiple-Output Functions and Their Application

Shinobu Nagayama, Tsutomu Sasao, 2001 .

Area-Time Complexities of Multi-Valued Decision Diagrams

Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, 2004 .

An Efficient Heuristic Algorithm for Linear Decomposition of Index Generation Functions

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2015 .

Minimization of average path length in BDDs by variable reordering

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, 2003 .