Jie Li Aw

Thermo-compression bonding assembly process and reliability studies of Cu pillar bump on Cu/Low-K Chip

F. X. Che, Jong-Kai Lin, K. Y. Au, 2014, 2014 IEEE 16th Electronics Packaging Technology Conference (EPTC).

3-D TSV Six-Die Stacking and Reliability Assessment of 20- $\mu$ m-Pitch Bumps on Large-Scale Dies

Jong Bum Lee, Jie Li Aw, Min Woo Rhee, 2017, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Development of bonding process for high density fine pitch micro bump interconnections with wafer level underfill for 3D applications

Vempati Srinivasa Rao, Chen Zhaohui, Ser Choong Chong, 2013, 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).

Chip to wafer bonding for three-dimensional integration of copper low K Chip by stacking process

Srinivasa Rao Vempati, Ser Choong Chong, Daniel Ismael Cereno, 2013, 2013 IEEE 15th Electronics Packaging Technology Conference (EPTC 2013).