Mainak Chaudhuri

发表

The impact of negative acknowledgments in shared memory scientific applications

Mainak Chaudhuri, Mark Heinrich, M. Heinrich, 2004, IEEE Transactions on Parallel and Distributed Systems.

Bypass and insertion algorithms for exclusive last-level caches

Mainak Chaudhuri, Jayesh Gaur, Sreenivas Subramoney, 2011, 2011 38th Annual International Symposium on Computer Architecture (ISCA).

Latency, Occupancy, and Bandwidth in DSM Multiprocessors: A Performance Evaluation

John L. Hennessy, Jaswinder Pal Singh, Mainak Chaudhuri, 2003, IEEE Trans. Computers.

Long-latency branches: how much do they matter?

Mainak Chaudhuri, Abhas Kumar, Nisheet Jain, 2006, CARN.

Divergence Aware Automated Partitioning of OpenCL Workloads

Pabitra Mitra, Mainak Chaudhuri, Soumyajit Dey, 2016, ISEC.

Active memory techniques for ccNUMA multiprocessors

Daehyun Kim, Mainak Chaudhuri, Mark Heinrich, 2003, Proceedings International Parallel and Distributed Processing Symposium.

Using Criticality of GPU Accesses in Memory Management for CPU-GPU Heterogeneous Multi-Core Processors

Mainak Chaudhuri, Siddharth Rai, Mainak Chaudhuri, 2017, ACM Trans. Embed. Comput. Syst..

Checkpointed early load retirement

José F. Martínez, Mainak Chaudhuri, Nevin Kirman, 2005, 11th International Symposium on High-Performance Computer Architecture.

Simplifying Active Memory Clusters by Leveraging Directory Protocol Threads

Mainak Chaudhuri, Mark Heinrich, Dhiraj D. Kalamkar, 2007, 2007 IEEE International Symposium on Performance Analysis of Systems & Software.

Tiny Directory: Efficient Shared Memory in Many-Core Systems with Ultra-Low-Overhead Coherence Tracking

Mainak Chaudhuri, Sudhanshu Shukla, 2017, 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA).

Integrating Memory Compression and Decompression with Coherence Protocols in Distributed Shared Memory Multiprocessors

Mainak Chaudhuri, Lakshmana Rao Vittanala, 2007, 2007 International Conference on Parallel Processing (ICPP 2007).

Ocean warning: avoid drowning

Mainak Chaudhuri, Mark Heinrich, 2003, CARN.

Integrated Memory Controllers with Parallel Coherence Streams

Mainak Chaudhuri, Mark Heinrich, 2007, IEEE Transactions on Parallel and Distributed Systems.

Pseudo-LIFO: The foundation of a new family of replacement policies for last-level caches

Mainak Chaudhuri, Mainak Chaudhuri, 2009, 2009 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

Cooling the Hot Sets: Improved Space Utilization in Large Caches via Dynamic Set Balancing

Mainak Chaudhuri, 2008 .

Shared Pattern History Tables in Multicomponent Branch Predictors With a Dealiasing Cache

Mainak Chaudhuri, Ansuman Banerjee, Bhaskar Sardar, 2020, IEEE Embedded Systems Letters.

Improving CPU Performance Through Dynamic GPU Access Throttling in CPU-GPU Heterogeneous Processors

Mainak Chaudhuri, Siddharth Rai, Mainak Chaudhuri, 2017, 2017 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW).

Sharing-Aware Efficient Private Caching in Many-Core Server Processors

Mainak Chaudhuri, Sudhanshu Shukla, 2017, 2017 IEEE International Conference on Computer Design (ICCD).

Performance Evaluation of Concurrent Lock-free Data Structures on GPUs

Prabhakar Misra, Mainak Chaudhuri, 2012, 2012 IEEE 18th International Conference on Parallel and Distributed Systems.

Implementing a parallel matrix factorization library on the cell broadband engine

Mainak Chaudhuri, B. C. Vishwas, Abhishek Gadia, 2009, HiPC 2009.

Exploring virtual network selection algorithms in DSM cache coherence protocols

Mainak Chaudhuri, Mark Heinrich, 2004, IEEE Transactions on Parallel and Distributed Systems.

Implementing a parallel matrix factorization library on the cell broadband engine

Mainak Chaudhuri, B. C. Vishwas, Abhishek Gadia, 2009, Sci. Program..

Accelerating schedule space exploration of multi-threaded programs with GPUs

Mainak Chaudhuri, Subhajit Roy, Prakhar Banga, 2016, 2016 ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE).

LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation

Mainak Chaudhuri, Jugash Chandarlapati, 2007, 2007 25th International Conference on Computer Design.

Introducing Hierarchy-awareness in replacement and bypass algorithms for last-level caches

Mainak Chaudhuri, Jayesh Gaur, Sreenivas Subramoney, 2012, 2012 21st International Conference on Parallel Architectures and Compilation Techniques (PACT).

PageNUCA: Selected policies for page-grain locality management in large shared chip-multiprocessor caches

Mainak Chaudhuri, 2009, 2009 IEEE 15th International Symposium on High Performance Computer Architecture.

Micro-Sector Cache

Mainak Chaudhuri, Mukesh Agrawal, Jayesh Gaur, 2017, ACM Trans. Archit. Code Optim..

Efficient management of last-level caches in graphics processors for 3D scene rendering workloads

Raghuram Srinivasan, Mainak Chaudhuri, Jayesh Gaur, 2013, 2013 46th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).

Pool directory: Efficient coherence tracking with dynamic directory allocation in many-core systems

Mainak Chaudhuri, Sudhanshu Shukla, 2015, 2015 33rd IEEE International Conference on Computer Design (ICCD).

SMTp: an architecture for next-generation scalable multi-threading

Mainak Chaudhuri, Mark Heinrich, M. Heinrich, 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

Characterizing multi-threaded applications for designing sharing-aware last-level cache replacement policies

Ragavendra Natarajan, Mainak Chaudhuri, 2013, 2013 IEEE International Symposium on Workload Characterization (IISWC).

Architectural extensions for executing coherence protocols on multi-threaded processors with integrated memory controllers

Mainak Chaudhuri, Mark Heinrich, 2004 .

Cache Coherence Protocol Design for Active Memory Systems

Daehyun Kim, Mainak Chaudhuri, Mark Heinrich, 2002, PDPTA.

Improving speculative loop parallelization via selective squash and speculation reuse

Sanjeev Kumar Aggarwal, Deepak Majeti, Mainak Chaudhuri, 2010, 2010 19th International Conference on Parallel Architectures and Compilation Techniques (PACT).

Leveraging cache coherence in active memory systems

Daehyun Kim, Mainak Chaudhuri, Mark Heinrich, 2002, ICS '02.

Architectural support for uniprocessor and multiprocessor active memory systems

Daehyun Kim, Mainak Chaudhuri, Mark Heinrich, 2004, IEEE Transactions on Computers.

Near-Optimal Access Partitioning for Memory Hierarchies with Multiple Heterogeneous Bandwidth Sources

Mainak Chaudhuri, Jayesh Gaur, Sreenivas Subramoney, 2017, 2017 IEEE International Symposium on High Performance Computer Architecture (HPCA).

Scavenger: A New Last Level Cache Architecture with Global Block Priority

José F. Martínez, Mainak Chaudhuri, Arkaprava Basu, 2007, 40th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2007).

Active Memory Clusters: Efficient Multiprocessing on Commodity Clusters

Mainak Chaudhuri, Mark Heinrich, William Evan Speight, 2002, ISHPC.

Exploiting Dynamic Reuse Probability to Manage Shared Last-level Caches in CPU-GPU Heterogeneous Processors

Mainak Chaudhuri, Siddharth Rai, Mainak Chaudhuri, 2016, ICS.

Zero Inclusion Victim: Isolating Core Caches from Inclusive Last-level Cache Evictions

Mainak Chaudhuri, Mainak Chaudhuri, 2021, 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA).

Zero Directory Eviction Victim: Unbounded Coherence Directory and Core Cache Isolation

Mainak Chaudhuri, 2021, 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA).