J. I. Acha

Theory and design of multivalued memory elements

J. L. Huertas, J. I. Acha, G. Sanchez Gomez, 1978, MVL '78.

On the synthesis of multivalued circuits using principally binary elements

J. L. Huertas, J. I. Acha, L. Macias, 1978, MVL '78.

On Input and Next-State Equations of the R-S Type M-Stable

José Luis Huertas, J. I. Acha, 1976, IEEE Transactions on Computers.

Asynchronous Modular Arbiter

Manuel Valencia-Barrero, J. Calvo, J. I. Acha, 1986, IEEE Transactions on Computers.

Self-Synchronization of Asynchronous Sequential Circuits Employing a General Clock Function

José Luis Huertas, J. I. Acha, J. Huertas, 1976, IEEE Transactions on Computers.