Peter Krotnev

Statistical BER Analysis of Wireline Links With Non-Binary Linear Block Codes Subject to DFE Error Propagation

Ming Yang, Anthony Chan Carusone, Shayan Shahramian, 2020, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 112-Gb/s PAM-4 Low-Power Nine-Tap Sliding-Block DFE in a 7-nm FinFET Wireline Receiver

David Cassan, Davide Tonietto, Marc-Andre LaCroix, 2022, IEEE Journal of Solid-State Circuits.

Pre-FEC and Post-FEC BER as Criteria for Optimizing Wireline Transceivers

Anthony Chan Carusone, Shayan Shahramian, Peter Krotnev, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

A 112Gb/s PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver

David Cassan, Marc-Andre LaCroix, Hossein Shakiba, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).

A 112Gb/s PAM-4, 168Gb/s PAM-8 7bit DAC-Based Transmitter in 7nm FinFET

Davide Tonietto, Euhan Chong, Peter Krotnev, 2021, ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC).

8.4 A 116Gb/s DSP-Based Wireline Transceiver in 7nm CMOS Achieving 6pJ/b at 45dB Loss in PAM-4/Duo-PAM-4 and 52dB in PAM-2

Yang Xu, Davide Tonietto, Babak Zamanlooy, 2021, 2021 IEEE International Solid- State Circuits Conference (ISSCC).