I-Wei Wu

Area-Efficient Instruction Set Extension Exploration with Hardware Design Space Exploration

Jean Jyh-Jiun Shann, Chung-Ping Chung, I-Wei Wu, 2011, J. Inf. Sci. Eng..

Improving performance of JNA by using LLVM JIT compiler

Jean Jyh-Jiun Shann, I-Wei Wu, Yu-Hsin Tsai, 2013, 2013 IEEE/ACIS 12th International Conference on Computer and Information Science (ICIS).

Reconfigurable Custom Functional Unit Generation and Exploitation for Multiple-Issue Processors

Jean Jyh-Jiun Shann, Chung-Ping Chung, I-Wei Wu, 2015 .

Display Technologies III Held in Taipei, Taiwan on 26-27 July 2000

I-Wei Wu, Heiju Uchiike, 2000 .

Instruction Fetch Energy Reduction Using Forward-Branch Bufferable Innermost Loop Buffer

Chung-Ping Chung, I-Wei Wu, Bin-Hua Tein, 2006, CDES.

Dynamic memory optimization and parallelism management for OpenCL

Jean Jyh-Jiun Shann, I-Wei Wu, Chao-Hung Hsu, 2014, 2014 International Conference on Information Science, Electronics and Electrical Engineering.

A seamless handoff approach of Mobile IP protocol for mobile wireless data networks

Wen-Shiung Chen, I-Wei Wu, Fongray Frank Young, 2002, IEEE Trans. Consumer Electron..

Performance of polysilicon TFT digital circuits fabricated with various processing techniques and device architectures

I-Wei Wu, A. Chiang, Tiao-Yuan Huang, 1990 .

The Crystallization and Hydrogenation Processes of Low Temperature Poly-Si Manufacture

I-Wei Wu, I-Min Lu, Chu-Jung Shih, 2000 .

A Translation Framework for Automatic Translation of Annotated LLVM IR into OpenCL Kernel Function

I-Wei Wu, Yu-Sheng Chen, Jyh-Jiun Shann, 2013 .

ETAHM: An energy-aware task allocation algorithm for heterogeneous multiprocessor

Jean Jyh-Jiun Shann, Chung-Ping Chung, I-Wei Wu, 2008, 2008 45th ACM/IEEE Design Automation Conference.

Reducing Code Size by Graph Coloring Register Allocation and Assignment Algorithm for Mixed-Width ISA Processor

Yu-Sheng Chen, Wei-Chung Hsu, Jean Jyh-Jiun Shann, 2009, 2009 International Conference on Computational Science and Engineering.

Instruction Set Extension Exploration in Multiple-Issue Architecture

Zhiyuan Chen, Jean Jyh-Jiun Shann, Chung-Ping Chung, 2008, 2008 Design, Automation and Test in Europe.

Extended Instruction Exploration for Multiple-Issue Architectures

Wei-Chung Hsu, Jean Jyh-Jiun Shann, Chung-Ping Chung, 2014, ACM Trans. Embed. Comput. Syst..

Instruction Set Extension Generation with Considering Physical Constraints

Shih-Chia Huang, Jean Jyh-Jiun Shann, Chung-Ping Chung, 2007, HiPEAC.

Instruction Emulation and OS Supports of a Hybrid Binary Translator for x86 Instruction Set Architecture

Jean Jyh-Jiun Shann, I-Wei Wu, I-Chun Liu, 2015, 2015 IEEE 12th Intl Conf on Ubiquitous Intelligence and Computing and 2015 IEEE 12th Intl Conf on Autonomic and Trusted Computing and 2015 IEEE 15th Intl Conf on Scalable Computing and Communications and Its Associated Workshops (UIC-ATC-ScalCom).