A. Mitev

发表

Finite-Point Gate Model for Fast Timing and Power Analysis

Yu Cao, D. Ganesan, A. Mitev, 2008, ISQED 2008.

Capturing device mismatch in analog and mixed-signal designs

A. Mitev, J. Wang, Yu Cao, 2008, IEEE Circuits and Systems Magazine.

Parameter Reduction for Variability Analysis by Slice Inverse Regression (SIR) Method

A. Mitev, Dongsheng Ma, Michael Mahmoud Marefat, 2007 .