Tingyuan Liang

LAMA: Link-Aware Hybrid Management for Memory Accesses in Emerging CPU-FPGA Platforms

Liang Feng, Jieru Zhao, Sharad Sinha, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Hi-DMM: High-Performance Dynamic Memory Management in High-Level Synthesis

Wei Zhang, Liang Feng, Jieru Zhao, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Hi-ClockFlow: Multi-Clock Dataflow Automation and Throughput Optimization in High-Level Synthesis

Jieru Zhao, Sharad Sinha, Wei Zhang, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Machine Learning Based Routing Congestion Prediction in FPGA High-Level Synthesis

Jieru Zhao, Sharad Sinha, Tingyuan Liang, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

FP-Stereo: Hardware-Efficient Stereo Vision for Embedded Applications

Wei Zhang, Jieru Zhao, Sharad Sinha, 2020, 2020 30th International Conference on Field-Programmable Logic and Applications (FPL).

A Hybrid Data-Consistent Framework for Link-Aware AccessManagement in Emerging CPU-FPGA Platforms

Liang Feng, Wei Zhang, Jieru Zhao, 2019, FPGA.

PAAS: A system level simulator for heterogeneous computing architectures

Wei Zhang, Liang Feng, Sharad Sinha, 2017, 2017 27th International Conference on Field Programmable Logic and Applications (FPL).

AMF-Placer: High-Performance Analytical Mixed-size Placer for FPGA

Jieru Zhao, Sharad Sinha, Tingyuan Liang, 2021, 2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD).