C. Bieser

Evaluation ofaPacket Switching Algorithm forNetwork on ChipTopologies using aXilinx Virtex-JI FPGAbased Rapid Prototyping System

Jürgen Becker, K. D. Mueller-Glaser, J. E. Becker, 2006 .

Evaluation of a Packet Switching Algorithm for Network on Chip Topologies using a Xilinx Virtex-II FPGA based Rapid Prototyping System

J.E. Becker, C. Bieser, J. Becker, 2006, 2006 IEEE International Symposium on Industrial Electronics.

Xilinx Virtex-II FPGA Design Acceleration Using a Novel Merging Methodology for Partial Configuration Bitstreams

C. Bieser, K.-D. Mueller-Glaser, K. Mueller-Glaser, 2006, 2006 49th IEEE International Midwest Symposium on Circuits and Systems.

COMPASS - a novel concept of a reconfigurable platform for automotive system development and test

K.-D. Müller-Glaser, C. Bieser, 2005, 16th IEEE International Workshop on Rapid System Prototyping (RSP'05).