Koji Tsunoda

A negative-resistance sense amplifier for low-voltage operating STT-MRAM

Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, 2015, The 20th Asia and South Pacific Design Automation Conference.

STT-MRAM Operating at 0.38V Using Negative-Resistance Sense Amplifier

Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, 2014, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A Counter-based Read Circuit Tolerant to Process Variation for 0.4-V Operating STT-MRAM

Koji Yanagida, Shusuke Yoshimoto, Shintaro Izumi, 2016, IPSJ Trans. Syst. LSI Des. Methodol..

Negative-resistance read and write schemes for STT-MRAM in 0.13µm CMOS

William Song, David Halupka, Ali Sheikholeslami, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).