J. H. Kim

Development of 3-D Stereo Endoscopy Image Processing System

J. H. Kim, 2002 .

Easily testable and configurable two-dimensional systolic arrays

S. M. Reddy, J. H. Kim, S. Reddy, 1992 .

An Efficient Reconfiguration Scheme for WSI of Cube-Connected Cycles with Bounded Channel Width

J. H. Kim, H. Youn, A. Singh, 1990 .

An enhanced one-step C-testable design of two-dimensional iterative logic arrays

J. H. Kim, H. Sung, 1992, [1992] Proceedings International Conference on Wafer Scale Integration.