Radhika Sanjeev Jagtap

A Methodology for Early Exploration of TSV Placement Topologies in 3D Stacked ICs

Radhika Sanjeev Jagtap, Sumeet S. Kumar, René van Leuken, 2012, 2012 15th Euromicro Conference on Digital System Design.

System Level Methodology for Interconnect Aware and Temperature Constrained Power Management of 3-D MP-SOCs

Amir Zjajo, Radhika Sanjeev Jagtap, Sumeet S. Kumar, 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.