Sotirios Xydis

发表

DDOT: Data Driven Online Tuning for energy efficient acceleration

Dimitrios Soudris, Sotirios Xydis, Eleftherios Christoforidis, 2020, 2020 57th ACM/IEEE Design Automation Conference (DAC).

Deploying and monitoring hadoop MapReduce analytics on single-chip cloud computer

Dimitrios Soudris, Sotirios Xydis, Andreas-Lazaros Georgiadis, 2016, PARMA-DITAM '16.

Dataflow Acceleration of Smith-Waterman with Traceback for High Throughput Next Generation Sequencing

Dimitrios Soudris, Georgi Gaydadjiev, Nils Voss, 2019, 2019 29th International Conference on Field Programmable Logic and Applications (FPL).

Oops: Optimizing Operation-mode Selection for IoT Edge Devices

Jörg Henkel, Lars Bauer, Farzad Samie, 2019, TOIT.

A Systematic Methodology for Reliability Improvements on SoC-Based Software Defined Radio Systems

Dimitrios Soudris, Kostas Siozios, Sotirios Xydis, 2012, VLSI Design.

GENESIS

Dimitrios Soudris, Kostas Siozios, Sotirios Xydis, 2015, ACM Trans. Embed. Comput. Syst..

Variation-aware voltage island formation for power efficient near-threshold manycore architectures

Gianluca Palermo, Cristina Silvano, Sotirios Xydis, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

Designing efficient DSP datapaths through compiler-in-the-loop exploration methodology

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Co-design of many-accelerator heterogeneous systems exploiting virtual platforms

Kostas Siozios, Efstathios Sotiriou-Xanthopoulos, Sotirios Xydis, 2014, 2014 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIV).

Workload- and process-variation aware voltage/frequency tuning for energy efficient performance sustainability of NTC manycores

Gianluca Palermo, Cristina Silvano, Sotirios Xydis, 2019, Integr..

Throughput balancing for energy efficient near-threshold manycores

Gianluca Palermo, Cristina Silvano, Sotirios Xydis, 2016, 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

Decoupled MapReduce for Shared-Memory Multi-Core Architectures

Dimitrios Soudris, Sotirios Xydis, Konstantinos Iliakis, 2018, IEEE Computer Architecture Letters.

Performance-power exploration of software-defined big data analytics: The AEGLE cloud backend

Dimitrios Soudris, Sotirios Xydis, Georgios Zervakis, 2016, 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS).

Flexibility Inlining into Arithmetic Data-paths Exploiting A Regular Interconnection Scheme

Kiamal Z. Pekmestzi, Sotirios Xydis, George Economakos, 2007, 2007 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

Distributed QoS management for Internet of Things under resource constraints

Jörg Henkel, Lars Bauer, Farzad Samie, 2016, 2016 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

Computation offloading and resource allocation for low-power IoT edge devices

Jörg Henkel, Lars Bauer, Farzad Samie, 2016, 2016 IEEE 3rd World Forum on Internet of Things (WF-IoT).

High Performance and Area Efficient Flexible DSP Datapath Synthesis

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

LOOG: Improving GPU Efficiency With Light-Weight Out-Of-Order Execution

Dimitrios Soudris, Sotirios Xydis, Konstantinos Iliakis, 2019, IEEE Computer Architecture Letters.

Energy-Efficient Acceleration of Spark Machine Learning Applications on FPGAs

Ioannis Stamelos, Dimitrios Soudris, Elias Koromilas, 2019 .

A virtual platform for exploring hierarchical interconnection for many-accelerator systems

Kostas Siozios, Efstathios Sotiriou-Xanthopoulos, Sotirios Xydis, 2015, 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS).

Design-Efficient Approximate Multiplication Circuits Through Partial Product Perforation

Dimitrios Soudris, Sotirios Xydis, Kostas Tsoumanis, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A HW/SW framework emulating wearable devices for remote wound monitoring and management

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2014, 2014 4th International Conference on Wireless Mobile Communication and Healthcare - Transforming Healthcare Through Innovations in Mobile and Wireless Technologies (MOBIHEALTH).

Variability-Aware Voltage Island Management for Near-Threshold Computing with Performance Guarantees

Gianluca Palermo, Cristina Silvano, Sotirios Xydis, 2016, Near Threshold Computing.

Hardware accelerated rician denoise algorithm for high performance magnetic resonance imaging

Dimitrios Soudris, Kostas Siozios, Efstathios Sotiriou-Xanthopoulos, 2014 .

Job-Arrival Aware Distributed Run-Time Resource Management on Intel SCC Manycore Platform

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2015, 2015 IEEE 13th International Conference on Embedded and Ubiquitous Computing.

High-level synthesis heuristics for run-time reconfigurable architectures

Sotirios Xydis, George Economakos, 2007, 2007 15th European Signal Processing Conference.

AEGLE's Cloud Infrastructure for Resource Monitoring and Containerized Accelerated Analytics

Dimitrios Soudris, Georgi Gaydadjiev, Tobias Becker, 2017, 2017 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

BLonD++: performance analysis and optimizations for enabling complex, accurate and fast beam dynamics studies

Dimitrios Soudris, Sotirios Xydis, Helga Timko, 2018, SAMOS.

Application-Arrival Rate Aware Distributed Run-Time Resource Management for Many-Core Computing Platforms

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2018, IEEE Transactions on Multi-Scale Computing Systems.

Interference-Aware Orchestration in Kubernetes

Dimitrios Soudris, Sotirios Xydis, Dimosthenis Masouros, 2020, ISC Workshops.

Mitigating Memory-Induced Dark Silicon in Many-Accelerator Architectures

Dimitrios Soudris, Kostas Siozios, Sotirios Xydis, 2015, IEEE Computer Architecture Letters.

CF-TUNE: Collaborative Filtering Auto-Tuning for Energy Efficient Many-Core Processors

Dimitrios Soudris, Sotirios Xydis, Eleftherios-Iordanis Christoforidis, 2018, IEEE Computer Architecture Letters.

Walking through the Energy-Error Pareto Frontier of Approximate Multipliers

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2018, IEEE Micro.

A regular interconnection scheme for efficient mapping of DSP kernels into reconfigurable hardware

Kiamal Z. Pekmestzi, Sotirios Xydis, George Economakos, 2007, 2007 15th European Signal Processing Conference.

Patient expectations “vis-à-vis” an innovative remote therapeutic device: Case of chronic wounds in diabetic patients

Sotirios Xydis, Marie Muller, Alison M. Foote, 2014, 2014 4th International Conference on Wireless Mobile Communication and Healthcare - Transforming Healthcare Through Innovations in Mobile and Wireless Technologies (MOBIHEALTH).

An Exploration Framework for Efficient High-Level Synthesis of Support Vector Machines: Case Study on ECG Arrhythmia Detection for Xilinx Zynq SoC

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2017, Journal of Signal Processing Systems.

Runtime Tuning of Dynamic Memory Management For Mitigating Footprint-Fragmentation Variations

Dimitrios Soudris, Alexandros Bartzas, Sotirios Xydis, 2011, ARCS Workshops.

Designing coarse-grain reconfigurable architectures by inlining flexibility into custom arithmetic data-paths

Kiamal Z. Pekmestzi, Sotirios Xydis, George Economakos, 2009, Integr..

A flexible architecture for DSP applications combining high performance arithmetic with small scale configurability

Kiamal Z. Pekmestzi, Sotirios Xydis, George Economakos, 2008, 2008 16th European Signal Processing Conference.

OpenCL-based Virtual Prototyping and Simulation of Many-Accelerator Architectures

Jürgen Becker, Dimitrios Soudris, Kostas Siozios, 2018, ACM Trans. Embed. Comput. Syst..

Flexible Datapath Synthesis through Arithmetically Optimized Operation Chaining

Kiamal Z. Pekmestzi, Sotirios Xydis, George Economakos, 2009, 2009 NASA/ESA Conference on Adaptive Hardware and Systems.

A meta-model assisted coprocessor synthesis framework for compiler/architecture parameters customization

Vittorio Zaccaria, Gianluca Palermo, Cristina Silvano, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

SWAN-iCARE Project: On the Efficiency of FPGAs Emulating Wearable Medical Devices for Wound Management and Monitoring

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2015, ARC.

Hardware accelerated rician denoise algorithm for high performance magnetic resonance imaging

Dimitrios Soudris, Efstathios Sotiriou-Xanthopoulos, Sotirios Xydis, 2014, 2014 4th International Conference on Wireless Mobile Communication and Healthcare - Transforming Healthcare Through Innovations in Mobile and Wireless Technologies (MOBIHEALTH).

2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Distributed Trade-Based Edge Device Management in Multi-Gateway IoT

Jörg Henkel, Lars Bauer, Farzad Samie, 2018, ACM Trans. Cyber Phys. Syst..

A High Level Synthesis Exploration Framework with Iterative Design Space Partitioning

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2010, ISVLSI.

SWAN-iCare project: Towards smart wearable and autonomous negative pressure device for wound monitoring and therapy

Dimitrios Soudris, Pierre Marcoux, Gabriela Dudnik, 2014, 2014 4th International Conference on Wireless Mobile Communication and Healthcare - Transforming Healthcare Through Innovations in Mobile and Wireless Technologies (MOBIHEALTH).

Co-design Implications of Cost-effective On-demand Acceleration for Cloud Healthcare Analytics: The AEGLE approach

Dimitrios Soudris, Sotirios Xydis, Konstantina Koliogeorgi, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Framework for Interconnection-Aware Domain-Specific Many-Accelerator Synthesis

Dimitrios Soudris, Kostas Siozios, Efstathios Sotiriou-Xanthopoulos, 2016, ACM Trans. Embed. Comput. Syst..

SPIRIT: Spectral-Aware Pareto Iterative Refinement Optimization for Supervised High-Level Synthesis

Vittorio Zaccaria, Gianluca Palermo, Cristina Silvano, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A framework for Compiler Level statistical analysis over customized VLIW architecture

Vittorio Zaccaria, Gianluca Palermo, Cristina Silvano, 2013, 2013 IFIP/IEEE 21st International Conference on Very Large Scale Integration (VLSI-SoC).

Multi-Level Approximate Accelerator Synthesis Under Voltage Island Constraints

Dimitrios Soudris, Sotirios Xydis, Georgios Zervakis, 2019, IEEE Transactions on Circuits and Systems II: Express Briefs.

Resource-Aware MapReduce Runtime for Multi/Many-core Architectures

Dimitrios Soudris, Sotirios Xydis, Konstantinos Iliakis, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Software design and optimization of ECG signal analysis and diagnosis for embedded IoT devices

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2017 .

Voltage island management in near threshold manycore architectures to mitigate dark silicon

Gianluca Palermo, Cristina Silvano, Sotirios Xydis, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2013, TODE.

Approximate Multiplier Architectures Through Partial Product Perforation: Power-Area Tradeoffs Analysis

Kiamal Z. Pekmestzi, Sotirios Xydis, Kostas Tsoumanis, 2015, ACM Great Lakes Symposium on VLSI.

Hybrid approximate multiplier architectures for improved power-accuracy trade-offs

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2015, 2015 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED).

High-Level-Synthesis extensions for scalable Single-Chip Many-Accelerators on FPGAs

Dimitrios Soudris, Kostas Siozios, Sotirios Xydis, 2015, 2015 25th International Conference on Field Programmable Logic and Applications (FPL).

Rapid prototyping and Design Space Exploration methodologies for many-accelerator systems

Dimitrios Soudris, Kostas Siozios, Efstathios Sotiriou-Xanthopoulos, 2015, 2015 25th International Conference on Field Programmable Logic and Applications (FPL).

Cooperative Arithmetic-Aware Approximation Techniques for Energy-Efficient Multipliers

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Thermal-aware datapath merging for coarse-grained reconfigurable processors

Gianluca Palermo, Cristina Silvano, Sotirios Xydis, 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

A Reconfigurable Arithmetic Data-path Based On Regular Interconnection

Kiamal Z. Pekmestzi, Sotirios Xydis, George Economakos, 2007, Second NASA/ESA Conference on Adaptive Hardware and Systems (AHS 2007).

An Integrated Exploration and Virtual Platform Framework for Many-Accelerator Heterogeneous Systems

Dimitrios Soudris, Kostas Siozios, Efstathios Sotiriou-Xanthopoulos, 2016, TECS.

AEGLE: A big bio-data analytics framework for integrated health-care services

Ioanna Chouvarda, Nicos Maglaveras, David Manset, 2015, 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS).

A TensorFlow Extension Framework for Optimized Generation of Hardware CNN Inference Engines

Dimitrios Soudris, Sotirios Xydis, Konstantina Koliogeorgi, 2020, Technologies.

High Performance and Area Efficient Flexible

Dimitrios Soudris, Sotirios Xydis, George Economakos, 2011 .

TF2FPGA: A Framework for Projecting and Accelerating Tensorflow CNNs on FPGA Platforms

Dimitrios Soudris, Sotirios Xydis, Vasileios Leon, 2019, 2019 8th International Conference on Modern Circuits and Systems Technologies (MOCAST).

Optimized Reconfigurable RTL Components for Performance Improvements During High-Level Synthesis

Sotirios Xydis, George Economakos, S. Xydis, 2009, 2009 12th Euromicro Conference on Digital System Design, Architectures, Methods and Tools.

Energy-efficient VLSI implementation of multipliers with double LSB operands

Dimitrios Soudris, Sotirios Xydis, Vasileios Leon, 2019, IET Circuits Devices Syst..

Scale-out beam longitudinal dynamics simulations

Dimitrios Soudris, Sotirios Xydis, Helga Timko, 2020, CF.

Effective Learning and Filtering of Faulty Heart-Beats for Advanced ECG Arrhythmia Detection using MIT-BIH Database

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2015, EAI Endorsed Trans. Pervasive Health Technol..

High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor Architectures

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach

Axel Jantsch, Iraklis Anagnostopoulos, Philippe Martin, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Flexible DSP Accelerator Architecture Exploiting Carry-Save Arithmetic

Kiamal Z. Pekmestzi, Sotirios Xydis, Kostas Tsoumanis, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Systematic Design and Evaluation of Reconfigurable Arithmetic Components in the Deep submicron Domain

Sotirios Xydis, George Economakos, Dimitris Bekiaris, 2014, J. Circuits Syst. Comput..

Energy profile analysis of Zynq-7000 programmable SoC for embedded medical processing: Study on ECG arrhythmia detection

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2016, 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS).

ECG signal analysis and arrhythmia detection on IoT wearable medical devices

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2016, 2016 5th International Conference on Modern Circuits and Systems Technologies (MOCAST).

The MOSART Mapping Optimization for Multi-Core ARchiTectures

Axel Jantsch, Iraklis Anagnostopoulos, Philippe Martin, 2010, ISVLSI.

Run-time reconfigurable solutions for adaptive control applications

Sotirios Xydis, George Economakos, Christoforos E. Economakos, 2007, ICINCO-SPSMC.

Dataflow Acceleration of scikit-learn Gaussian Process Regression

Dimitrios Soudris, Sotirios Xydis, Michail Doukas, 2017, PARMA-DITAM '17.

Reconfigurable Computing for Analytics Acceleration of Big Bio-Data: The AEGLE Approach

Dimitrios Soudris, Sotirios Xydis, Andreas Raptopoulos, 2015, ARC.

2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures

Rainer Leupers, Gerd Ascheid, Heinrich Meyr, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Effective Platform-Level Exploration for Heterogeneous Multicores Exploiting Simulation-Induced Slacks

Dimitrios Soudris, Kostas Siozios, Efstathios Sotiriou-Xanthopoulos, 2014, PARMA-DITAM '14.

Rusty: Runtime Interference-Aware Predictive Monitoring for Modern Multi-Tenant Systems

Dimitrios Soudris, Sotirios Xydis, Dimosthenis Masouros, 2021, IEEE Transactions on Parallel and Distributed Systems.

Mapping DSP Applications onto High-Performance Architectural Templates with Inlined Flexibility

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2008, 2008 NASA/ESA Conference on Adaptive Hardware and Systems.

VOSsim: A Framework for Enabling Fast Voltage Overscaling Simulation for Approximate Computing Circuits

Dimitrios Soudris, Sotirios Xydis, Georgios Zervakis, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

SoftRM: Self-Organized Fault-Tolerant Resource Management for Failure Detection and Recovery in NoC Based Many-Cores

Dimitrios Soudris, Sotirios Xydis, Vasileios Tsoutsouras, 2017, ACM Trans. Embed. Comput. Syst..

Exploration of GPU sharing policies under GEMM workloads

Dimitrios Soudris, Sotirios Xydis, Konstantina Koliogeorgi, 2020, SCOPES.

Rusty: Runtime System Predictability Leveraging LSTM Neural Networks

Dimitrios Soudris, Sotirios Xydis, Dimosthenis Masouros, 2019, IEEE Computer Architecture Letters.

A Scheduling Postprocessor to Exploit Morphable RTL Components During High-Level Synthesis

Sotirios Xydis, George Economakos, S. Xydis, 2008, 2008 11th EUROMICRO Conference on Digital System Design Architectures, Methods and Tools.

Efficient High Level Synthesis Exploration Methodology Combining Exhaustive and Gradient-Based Pruned Searching

Kiamal Z. Pekmestzi, Dimitrios Soudris, Sotirios Xydis, 2010, 2010 IEEE Computer Society Annual Symposium on VLSI.

Dynamic Memory Management in Vivado-HLS for Scalable Many-Accelerator Architectures

Dimitrios Soudris, Kostas Siozios, Sotirios Xydis, 2015, ARC.

High-level synthesis with coarse grain reconfigurable components

Sotirios Xydis, George Economakos, S. Xydis, 2009, 2009 IEEE International Symposium on Parallel & Distributed Processing.

Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations

Axel Jantsch, Iraklis Anagnostopoulos, Zhonghai Lu, 2011, IEEE Embedded Systems Letters.

Custom multi-threaded Dynamic Memory Management for Multiprocessor System-on-Chip platforms

Kiamal Z. Pekmestzi, Iraklis Anagnostopoulos, Dimitrios Soudris, 2010, 2010 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator

Kiamal Z. Pekmestzi, Costas Efstathiou, Sotirios Xydis, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

Thermal optimization for micro-architectures through selective block replication

Dimitrios Soudris, Kostas Siozios, Sotirios Xydis, 2011, 2011 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation.

Construction of dual mode components for reconfiguration aware high-level synthesis

Dimitrios Soudris, Sotirios Xydis, George Economakos, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

Application-Specific Multi-Threaded Dynamic Memory Management

Iraklis Anagnostopoulos, Dimitrios Soudris, Alexandros Bartzas, 2012 .

A design methodology for high-performance and low-leakage fixed-point transpose FIR filters

Kiamal Z. Pekmestzi, Sotirios Xydis, George Economakos, 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).

FaaS and Curious: Performance Implications of Serverless Functions on Edge Computing Platforms

Dimitrios Soudris, Sotirios Xydis, Dimosthenis Masouros, 2021, ISC Workshops.

Resource Aware GPU Scheduling in Kubernetes Infrastructure

Dimitrios Soudris, Sotirios Xydis, Dimosthenis Masouros, 2021, PARMA-DITAM@HiPEAC.

FPGA Acceleration of Short Read Alignment

Dimitrios Soudris, Sotirios Xydis, Konstantina Koliogeorgi, 2021, HEART.

Performance Analysis and Auto-tuning for SPARK in-memory analytics

Dimitrios Soudris, Sotirios Xydis, Dimosthenis Masouros, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

FADE: FaaS-inspired application decomposition and Energy-aware function placement on the Edge

Dimitrios Soudris, Sotirios Xydis, Charalampos Marantos, 2021, SCOPES.