Yao-Ching Cheng

High performance 50 nm CMOS devices for microprocessor and embedded processor core applications

Wei Jin, Jia Chen, C. Wann, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Scalability and biasing strategy for CMOS with active well bias

Bomy Chen, R. Dennard, Chih-Yung Lin, 2001, 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).

A high performance CMOS device with inverter delay 13 ps at 1.2 V power supply

C. Wann, S. Biesemans, Yao-Ching Cheng, 2001, 2001 International Symposium on VLSI Technology, Systems, and Applications. Proceedings of Technical Papers (Cat. No.01TH8517).