Cong-Kha Pham

发表

Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System using Frequent Items Counter

Takahiro Hosaka, Trong-Thuc Hoang, Van-Phuc Hoang, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

VLSI Design of Frequent Items Counting Using Binary Decoders Applied to 8-bit per Item Case-study

Katsumi Inoue, Trong-Thuc Hoang, Cong-Kha Pham, 2018, 2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).

A Flexible High-Bandwidth Low-Latency Multi-Port Memory Controller pdf

Duc-Hung Le, Cong-Kha Pham, Xuan-Thuan Nguyen, 2017, ArXiv.

An Edge Extraction Method for Color Image Using Multiple-Valued LoG Filter and Color Space

Cong-Kha Pham, Koutaro Yamano, 2007, 6th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007).

A low-resource low-latency hybrid adaptive CORDIC in 180-nm CMOS technology

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2015, TENCON 2015 - 2015 IEEE Region 10 Conference.

A 1.2-V 162.9-pJ/cycle Bitmap Index Creation Core with 0.31-pW/bit Standby Power on 65-nm SOTB pdf

Katsumi Inoue, Trong-Thuc Hoang, Cong-Kha Pham, 2019, Microprocess. Microsystems.

A compact, ultra-low power AES-CCM IP core for wireless body area networks

Van-Phuc Hoang, Cong-Kha Pham, Thi-Thanh-Dung Phan, 2016, 2016 IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC).

A perpetuum mobile 32bit CPU on 65nm SOTB CMOS technology with reverse-body-bias assisted sleep mode

Cong-Kha Pham, Kimiyoshi Usami, Hideharu Amano, 2014, 2014 IEEE Hot Chips 26 Symposium (HCS).

A 1.5V Current-Mode Operational Amplifier Using Level Shifter Technique

Cong-Kha Pham, Socheat Heng, 2006, 2006 International Symposium on VLSI Design, Automation and Test.

Fuzzy processors using Neural Phenomena in CMOS Digital LSI

Cong-Kha Pham, Katsufusa Shono, Shinichi Ooki, 1992 .

Cryptographic Accelerators for Trusted Execution Environment in RISC-V Processors

Trong-Thuc Hoang, Cong-Kha Pham, Ckristian Duran, 2020, ISCAS.

Design of a parallel CAM-based multi-match search system using 0.18-µm CMOS process

Katsumi Inoue, Duc-Hung Le, Cong-Kha Pham, 2014, 2014 IEEE Fifth International Conference on Communications and Electronics (ICCE).

Highly parallel bitmap-based regular expression matching for text analytics

Katsumi Inoue, Cong-Kha Pham, Xuan-Thuan Nguyen, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

A Stochastic Bit-Stream Digital Neuron Using Generalized LFSR and Its Application to Two-Dimensional Binary Classification

Cong-Kha Pham, Makoto Fukuda, 2005 .

Low-Power Full-Input-Range Current-Mode Operational Amplifier Using Level-Shifter Technique (Special Issue on Nonlinear Circuits and Signal Processing)

Cong-Kha Pham, Socheat Heng, 2006 .

Design of co-processor for real-time HMM-based text-to-speech on hardware system applied to Vietnamese

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2015, IEICE Electron. Express.

A simple 6-bit neural-based A/D converter employing only CMOS inverters

Cong-Kha Pham, Mamoru Tanaka, K. Shono, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

Efficient LUT-Based Truncated Multiplier and Its Application in RGB to YCbCr Color Space Conversion

Van-Phuc Hoang, Cong-Kha Pham, C. Pham, 2012, IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences.

A 44μW/10MHz minimum power operation of 50K logic gate using 65nm SOTB devices with back gate control

Cong-Kha Pham, Nobuyuki Sugii, Koichiro Ishibashi, 2013, 2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

A CAM-Based Information Detection Hardware System for Fast Image Matching on FPGA

Katsumi Inoue, Duc-Hung Le, Cong-Kha Pham, 2014, IEICE Trans. Electron..

An FPGA-Based Information Detection Hardware System Employing Multi-Match Content Addressable Memory

Katsumi Inoue, Duc-Hung Le, Cong-Kha Pham, 2012, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Improvement of LDO's PSRR deteriorated by reducing power consumption : Implementation and experimental results

Cong-Kha Pham, Socheat Heng, 2009, 2009 IEEE International Conference on IC Design and Technology.

A parallel pipeline CORDIC based on adaptive angle selection

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2016, 2016 International Conference on Electronics, Information, and Communications (ICEIC).

An efficient multi-port memory controller for multimedia applications

Cong-Kha Pham, Xuan-Thuan Nguyen, 2015, The 20th Asia and South Pacific Design Automation Conference.

A simple neural-based A/D converter employing CMOS inverters

Cong-Kha Pham, Mamoru Tanaka, K. Shono, 1994, Proceedings of 1994 IEEE International Conference on Neural Networks (ICNN'94).

A high-performance bitmap-index-based query processor on 65-nm SOTB CMOS process

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2016, 2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

A fully-parallel information detection hardware system employing Content Addressable Memory

Duc-Hung Le, Cong-Kha Pham, M. Sowa, 2012, 2012 Fourth International Conference on Communications and Electronics (ICCE).

A novel synapses circuit and its application to a neural-based A/D converter

Cong-Kha Pham, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Compensated circuit for Low Dropout Regulator having stable load regulation after consideration of bonding wire resistance

Cong-Kha Pham, Socheat Heng, 2007, 2007 18th European Conference on Circuit Theory and Design.

CMOS digital retina chip with multi-bit neurons for image coding

Cong-Kha Pham, Mamoru Tanaka, Katsufusa Shono, 1993, 1993 IEEE International Symposium on Circuits and Systems.

A two-stage-pipeline CPU of SH-2 architecture implemented on FPGA and SoC for IoT, edge AI and robotic applications

Binh Nguyen, Cong-Kha Pham, Fumio Arakawa, 2018, 2018 IEEE Symposium in Low-Power and High-Speed Chips (COOL CHIPS).

Discrete Time Cellular Neural Networks with Two Types of Neuron Circuits for Image Coding and Their VLSI Implementations

Cong-Kha Pham, Mamoru Tanaka, M. Ikegami, 1995 .

A 219-μW 1D-to-2D-Based Priority Encoder on 65-nm SOTB CMOS

Katsumi Inoue, Trong-Thuc Hoang, Cong-Kha Pham, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

The Memorism Processor: Towards a Memory-Based Artificially Intelligence Complementing the von Neumann Architecture

Katsumi Inoue, Cong-Kha Pham, 2017 .

A Proposal to Solve N-Queens Problems Using Maximum Neuron Model with A Modified Hill-Climbing Term

Cong-Kha Pham, Wataru Noguchi, 2006, The 2006 IEEE International Joint Conference on Neural Network Proceedings.

Reducing Bitrate and Increasing the Quality of Inter Frame by Avoiding Quantization Errors in Stationary Blocks

Cong-Kha Pham, Minh-Trien Pham, Duy-Hieu Bui, 2020, EAI Endorsed Trans. Ind. Networks Intell. Syst..

A bit-level matrix transpose for bitmap-index-based data analytics

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2016, 2016 IEEE Sixth International Conference on Communications and Electronics (ICCE).

Chaotic behavior and synchronization phenomena in a novel chaotic transistors circuit

Cong-Kha Pham, Mamoru Tanaka, M. Korehisa, 1996 .

Low-resource low-latency hybrid adaptive CORDIC with floating-point precision

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2015, IEICE Electron. Express.

Associative dynamics of competitive cellular neural network

Cong-Kha Pham, Mamoru Tanaka, Mitsuhisa Kanaya, 1995, Proceedings of ISCAS'95 - International Symposium on Circuits and Systems.

High-speed 8/16/32-point DCT Architecture Using Fixed-rotation Adaptive CORDIC

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Low power LDO with fast load transient response based on quick response circuit

Cong-Kha Pham, Socheat Heng, Weichun Tung, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A 0.75-V 32-MHz 181-µW SOTB-65nm Floating-point Twiddle Factor Using Adaptive CORDIC

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2019, 2019 IEEE International Conference on Industrial Technology (ICIT).

A DC-DC Converter using a high speed soft-start control circuit

Cong-Kha Pham, Kimio Shibata, C. Pham, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

An FPGA approach for fast bitmap indexing

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2016, IEICE Electron. Express.

Bifurcational communication with novel chaotic transistors circuits

Cong-Kha Pham, Mamoru Tanaka, 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

A Low-Power High-PSRR Low-Dropout Regulator With Bulk-Gate Controlled Circuit

Cong-Kha Pham, Socheat Heng, C. Pham, 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.

BITDRC : A Hardware Accelerator for Design Rule Checking on Bit-Mapping CAD System

Cong-Kha Pham, Katsufusa Shono, Shinichi Ooki, 1991 .

A high-throughput and low-power design for bitmap indexing on 65-nm SOTB CMOS process

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2016, 2016 International Conference on IC Design and Technology (ICICDT).

An efficient ASIC implementation of logarithm approximation for HDR image processing

Van-Phuc Hoang, Cong-Kha Pham, Xuan-Tien Do, 2013, 2013 International Conference on Advanced Technologies for Communications (ATC 2013).

A 180-nm CMOS bitmap-index-based query processor for fast data analytics

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2017, 2017 International Conference on Recent Advances in Signal Processing, Telecommunications & Computing (SigTelCom).

A 1.05-V 62-MHz with 0.12-nW standby power SOTB-65 nm chip of 32-point DCT based on adaptive CORDIC

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2019, IEICE Electron. Express.

A Scalable High-Performance Priority Encoder Using 1D-Array to 2D-Array Conversion

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2017, IEEE Transactions on Circuits and Systems II: Express Briefs.

An Improved All-Digital Background Calibration Technique for Channel Mismatches in High Speed Time-Interleaved Analog-to-Digital Converters

Cong-Kha Pham, Van-Phuc Hoang, Van-Thanh Ta, 2020, Electronics.

A 1.2-V 90-MHz Bitmap Index Creation Accelerator with 0.27-nW Standby Power on 65-nm Silicon-On-Thin-Box (SOTB) CMOS

Trong-Thuc Hoang, Van-Phuc Hoang, Katsumi Inoue, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

An Improved Linear Difference Method with High ROM Compression Ratio in Direct Digital Frequency Synthesizer

Van-Phuc Hoang, Cong-Kha Pham, 2011, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

An Efficient I/O Architecture for RAM-Based Content-Addressable Memory on FPGA

Katsumi Inoue, Trong-Thuc Hoang, Cong-Kha Pham, 2019, IEEE Transactions on Circuits and Systems II: Express Briefs.

A reliable protocol for multimedia transmission over wireless sensor networks

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2015, 2015 11th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).

Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB)

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2020, IEICE Electron. Express.

A high-throughput multi-match priority encoder for data retrieval on 65-nm SOTB CMOS process

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2016, 2016 IEEE Region 10 Conference (TENCON).

A bitmap memory bank which allows block accesses

Cong-Kha Pham, Katsufusa Shono, Hajime Takakubo, 1991 .

A CORDIC-based QR decomposition for MIMO signal detector

Trong-Thuc Hoang, Cong-Kha Pham, Xuan-Thuan Nguyen, 2018, IEICE Electron. Express.

A decentralized localization scheme for swarm robotics based on coordinate geometry and distributed gradient descent

Cong-Kha Pham, Trong-Tu Bui, Huu-Thuan Huynh, 2016 .

Low-error and efficient fixed-width squarer for digital signal processing applications

Van-Phuc Hoang, Cong-Kha Pham, 2012, 2012 Fourth International Conference on Communications and Electronics (ICCE).

A CAM-based Information Detection Hardware System for fast exact pattern matching

Katsumi Inoue, Duc-Hung Le, Cong-Kha Pham, 2013, 2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS).

A Hardware Accelerator for Design-Rule Checking in a Bit-Mapping CAD System (Special Section on VLSI Design and CAD Algorithms)

Cong-Kha Pham, Katsufusa Shono, 1993 .

A 0.9-V 50-MHz 256-bit 1D-to-2D-based single/multi-match priority encoder with 0.67-nW standby power on 65-nm SOTB CMOS

Katsumi Inoue, Trong-Thuc Hoang, Cong-Kha Pham, 2020, Microprocess. Microsystems.

A compact adaptive slope compensation circuit for Current-Mode DC-DC converter

Cong-Kha Pham, Kimio Shibata, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

Study of Microprocessors : 2-bit Microcomputer and Bit-Serial Data-Flow Processor

Cong-Kha Pham, K. Shono, Tomoaki Ando, 1990 .

Minimum adder-delay architecture of 8/16/32-point DCT based on fixed-rotation adaptive CORDIC

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2018, IEICE Electron. Express.

A floating-point FFT Twiddle factor implementation based on adaptive angle recoding CORDIC

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2017, 2017 International Conference on Recent Advances in Signal Processing, Telecommunications & Computing (SigTelCom).

Design and performance of CMOS analog fuzzy chips

Cong-Kha Pham, K. Shono, 1993, Third International Conference on Industrial Fuzzy Control and Intelligent Systems.

An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation

Trong-Thuc Hoang, Cong-Kha Pham, Xuan-Thuan Nguyen, 2018, IEEE Access.

A novel CAM-based Information Detection Hardware System on FPGA

Katsumi Inoue, Duc-Hung Le, Cong-Kha Pham, 2012 .

A fast CAM-based Watermarking extraction on FPGA

Katsumi Inoue, Duc-Hung Le, Cong-Kha Pham, 2013, Proceedings of 2013 International Conference on IC Design & Technology (ICICDT).

A pulse model neuron with high accurate calculation and its application to two-dimensional binary classification

Cong-Kha Pham, M. Fukuda, 2004, Proceedings of the 2004 Intelligent Sensors, Sensor Networks and Information Processing Conference, 2004..

A 400mV 0.59mW low-power CAM-based pattern matching system on 65nm SOTB process

Duc-Hung Le, Cong-Kha Pham, Hong-Thu Nguyen, 2015, TENCON 2015 - 2015 IEEE Region 10 Conference.

An Efficient Hardware Implementation of Residual Data Binarization in HEVC CABAC Encoder

Cong-Kha Pham, Duy-Hieu Bui, Xuan-Tu Tran, 2020 .

A Low-Power Hybrid Adaptive CORDIC

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2018, IEEE Transactions on Circuits and Systems II: Express Briefs.

FPGA-based frequent items counting using matrix of equality comparators

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS).

Quadrature multi-carrier DCSK: A high-efficiency scheme for radio communications

Cong-Kha Pham, Nguyen Xuan Quyen, 2017, 2017 International Conference on Advanced Technologies for Communications (ATC).

Reliable and energy-efficient transmission on the Internet-of-Video-Things

Cong-Kha Pham, Xuan-Thuan Nguyen, Yuichiro Mori, 2017, 2017 17th International Symposium on Communications and Information Technologies (ISCIT).

CK-2-6 DataBase Processor (DBP) which Optimized for Searching and Analyzing of Big Data

Katsumi Inoue, Cong-Kha Pham, Xuan-Thuan Nguyen, 2015 .

Design of a low-power fixed-point 16-bit digital signal processor using 65nm SOTB process

Duc-Hung Le, Cong-Kha Pham, Xuan-Thuan Nguyen, 2015, 2015 International Conference on IC Design & Technology (ICICDT).

A High-Throughput Low-Energy Arithmetic Processor

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2018, IEICE Trans. Electron..

An efficient FPGA-based database processor for fast database analytics

Katsumi Inoue, Trong-Thuc Hoang, Cong-Kha Pham, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Heterogeneous Hardware-assisted Parallel Processing for BWA-MEM DNA Alignment

Cong-Kha Pham, Cuong Pham-Quoc, Binh Kieu-Do-Nguyen, 2020, 2020 RIVF International Conference on Computing and Communication Technologies (RIVF).

Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications

Van-Phuc Hoang, Cong-Kha Pham, 2013, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

CMOS Schmitt Trigger Circuit with Controllable Hysteresis Using Logical Threshold Voltage Control Circuit

Cong-Kha Pham, C. Pham, 2007, 6th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007).

Low-Power Floating-Point Adaptive-CORDIC-Based FFT Twiddle Factor on 65-nm Silicon-on-Thin-BOX (SOTB) With Back-Gate Bias

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2019, IEEE Transactions on Circuits and Systems II: Express Briefs.

High-performance DCT architecture based on angle recoding CORDIC and Scale-Free Factor

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2016, 2016 IEEE Sixth International Conference on Communications and Electronics (ICCE).

Design a Fast CAM-Based Exact Pattern Matching System on FPGA and 0.18µm CMOS Process

Katsumi Inoue, Duc-Hung Le, Cong-Kha Pham, 2013, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Quick Boot of Trusted Execution Environment With Hardware Accelerators

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2020, IEEE Access.

An all-digital PLL with SAR frequency locking system in 65nm SOTB CMOS

Cong-Kha Pham, Keita Arai, 2016, 2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

An efficient fixed-point arithmetic processor using a hybrid CORDIC algorithm

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2018, 2018 23rd Asia and South Pacific Design Automation Conference (ASP-DAC).

Problem solving of artificial intelligence with the Memorism processor

Cong-Kha Pham, Inoue Katsumi, 2018 .

Hardware-assisted High-performance DNA Alignment System

Cong-Kha Pham, Cuong Pham-Quoc, Binh Kieu-Do-Nguyen, 2020, ICIIT.

A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOS Technology with Reverse-Body-Bias Assisted Sleep Mode

Hideharu Amano, Cong-Kha Pham, Kazutoshi Kobayashi, 2015 .

Frequent items counter based on binary decoders

Katsumi Inoue, Trong-Thuc Hoang, Cong-Kha Pham, 2018, IEICE Electron. Express.

A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14µA sleep current using Reverse Body Bias Assisted 65nm SOTB CMOS technology

Hideharu Amano, Duc-Hung Le, Cong-Kha Pham, 2014, 2014 IEEE COOL Chips XVII.

A hybrid adaptive CORDIC in 65nm SOTB CMOS process

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

An ultra-low power AES encryption core in 65nm SOTB CMOS process

Van-Phuc Hoang, Cong-Kha Pham, Van-Lan Dao, 2016, 2016 International SoC Design Conference (ISOCC).

A novel chaos generator employing CMOS inverter for cellular neural networks

Cong-Kha Pham, M. Tanaka, 1994, Proceedings of the Third IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA-94).

Successive Approximation Analog-to-Digital Conversion Employing Analog-Digital-Balance Circuit

Cong-Kha Pham, Katsufusa Shono, 1990 .

A low power AES-GCM authenticated encryption core in 65nm SOTB CMOS process

Van-Phuc Hoang, Cong-Kha Pham, Van-Tinh Nguyen, 2017, 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS).

Simple Logic Threshold Conversion Circuits

Cong-Kha Pham, 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

New design method of low power over current protection circuit for low dropout regulator

Cong-Kha Pham, Socheat Heng, Weichun Tung, 2009, 2009 International Symposium on VLSI Design, Automation and Test.

Bifurcation and chaos in CMOS inverters ring oscillator

Cong-Kha Pham, Mamoru Tanaka, Katsufusa Shono, 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

Tolerance on Geometrical Operation as an Attack to Watermarked JPEG Image

Cong-Kha Pham, Hiroshi Yamashita, 2005, KES.

Implementation of a Novel CMOS Synapses Circuit (Special Issue on the Application of Signal Processing(2))

Cong-Kha Pham, 2003 .

VLSI Design of Floating-Point Twiddle Factor Using Adaptive CORDIC on Various Iteration Limitations

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2018, 2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC).

A Low-Latency Parallel Pipeline CORDIC

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2017, IEICE Trans. Electron..

A Neural-Based A/D Converter Using Only CMOS Inverters

Cong-Kha Pham, 2000 .

An FPGA approach for high-performance multi-match priority encoder

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2016, IEICE Electron. Express.

Design a fast CAM-based information detection system on FPGA and 0.18µm ASIC technology

Katsumi Inoue, Duc-Hung Le, Cong-Kha Pham, 2013, 2013 IEEE International Conference of Electron Devices and Solid-state Circuits.

An Improved Hybrid LUT-Based Architecture for Low-Error and Efficient Fixed-Width Squarer

Van-Phuc Hoang, Cong-Kha Pham, 2012, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Hardware Implementation of Background Calibration Technique for TIADCs with Signals in Any Nyquist Bands

Van-Phuc Hoang, Cong-Kha Pham, Duc Minh Nguyen, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A fast CAM-based image matching system on FPGA

Katsumi Inoue, Duc-Hung Le, Cong-Kha Pham, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

An Efficient Hardware Implementation of Radix-16 Montgomery Multiplication

Cong-Kha Pham, Bien-Cuong Nguyen, 2019, 2019 IEEE 8th Global Conference on Consumer Electronics (GCCE).

A wide frequency range and adjustable duty cycle CMOS ring voltage controlled oscillator

Cong-Kha Pham, Minh-Hai Nguyen, 2010, International Conference on Communications and Electronics 2010.

Parallel pipelining configurable multi-port memory controller for multimedia applications

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2015, 2015 IEEE International Symposium on Circuits and Systems (ISCAS).

A hardware accelerator for solving the n-queen problem

Cong-Kha Pham, Wataru Noguchi, 2006, Computational Intelligence.

A Low-Power High Accuracy Over Current Protection Circuit for Low Dropout Regulator

Cong-Kha Pham, Socheat Heng, 2009, IEICE Trans. Electron..

SAR: A Self-Adaptive and Reliable protocol for wireless multimedia sensor networks

Cong-Kha Pham, Xuan-Thuan Nguyen, Hong-Thu Nguyen, 2015, 2015 Seventh International Conference on Ubiquitous and Future Networks.

Hardware Trojan Detection Techniques Using Side-Channel Analysis

Van-Phuc Hoang, Cong-Kha Pham, Xuan-Nam Tran, 2019, 2019 6th NAFOSTED Conference on Information and Computer Science (NICS).

A CORDIC-based Trigonometric Hardware Accelerator with Custom Instruction in 32-bit RISC-V System-on-Chip

Trong-Thuc Hoang, Cong-Kha Pham, Quynh Nguyen Quang Nhu, 2021, 2021 IEEE Hot Chips 33 Symposium (HCS).

ChaCha20-Poly1305 Crypto Core Compatible with Transport Layer Security 1.3

Trong-Thuc Hoang, Cong-Kha Pham, Kuniyasu Suzaki, 2021, 2021 18th International SoC Design Conference (ISOCC).

Convergence of 5G Technologies, Artificial Intelligence and Cybersecurity of Networked Societies for the Cities of Tomorrow

Van-Phuc Hoang, Cong-Kha Pham, Trung Q. Duong, 2021, Mobile Networks and Applications.

A Fully Digital True Random Number Generator With Entropy Source Based in Frequency Collapse

Trong-Thuc Hoang, Cong-Kha Pham, Kuniyasu Suzaki, 2021, IEEE Access.

A trigonometric hardware acceleration in 32-bit RISC-V microcontroller with custom instruction

Trong-Thuc Hoang, Cong-Kha Pham, Xuan-Tu Tran, 2021, IEICE Electronics Express.

High-Performance FPGA-Based BWA-MEM Accelerator

Cong-Kha Pham, Cuong Pham-Quoc, Binh Kieu-Do-Nguyen, 2021 .

A proposal for enhancing training speed in deep learning models based on memory activity survey

Trong-Thuc Hoang, Cong-Kha Pham, Xuan-Tu Tran, 2021, IEICE Electron. Express.

Correlation Power Analysis Attack Resisted Cryptographic RISC-V SoC with Random Dynamic Frequency Scaling Countermeasure

Trong-Thuc Hoang, Cong-Kha Pham, Kuniyasu Suzaki, 2021, IEEE Access.

Exploiting the Back-Gate Biasing Technique as a Countermeasure Against Power Analysis Attacks

Trong-Thuc Hoang, Cong-Kha Pham, Kuniyasu Suzaki, 2021, IEEE Access.

System-on-Chip Implementation of Trusted Execution Environment with Heterogeneous Architecture

Trong-Thuc Hoang, Cong-Kha Pham, Kuniyasu Suzaki, 2021, 2021 IEEE Hot Chips 33 Symposium (HCS).

A Low-Power Low-Area SoC based in RISC-V Processor for IoT Applications

Trong-Thuc Hoang, Cong-Kha Pham, Koichiro Ishibashi, 2021, 2021 18th International SoC Design Conference (ISOCC).

Novel Quasi-Symmetrical Approach for Efficient Logarithmic and Anti-logarithmic Converters

Van-Phuc Hoang, Cong-Kha Pham, 2012 .

Chaotic Behavior in Simple Looped MOS Inverters

Cong-Kha Pham, Katsufusa Shono, Mamoru Tanaka, 1995 .

Quick response circuit for low-power LDO voltage regulators to improve load transient response

Cong-Kha Pham, S. Heng, 2007, 2007 International Symposium on Communications and Information Technologies.