Naoya Inoue

Material and Structure Designs for Reliable Quad-Flat-Package for Scaled-Down Ultralarge-Scale Integrations With Porous Low-$k/{\rm Cu}$ Interconnects

Yoshihiro Hayashi, Masayoshi Tagami, Fuminori Ito, 2013, IEEE Transactions on Components, Packaging and Manufacturing Technology.

A Method of Increasing Watermark Information Capacity with Five Sections for Audio Watermarking Method Based on Amplitude Modification

Akio Ogihara, Motoi Iwata, Akira Shiozaki, 2008 .

Challenges in low-k integration of advanced Cu BEOL beyond 14 nm node

Naoya Inoue, 2013, 2013 IEEE International Electron Devices Meeting.

Low thermal-budget fabrication of sputtered-PZT capacitor on multilevel interconnects for embedded FeRAM

Y. Hayashi, Naoya Inoue, Y. Hayashi, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Impact of Barrier Metal Sputtering on Physical and Chemical Damages in Low-k SiOCH Films with Various Hydrocarbon Content

Yoshihiro Hayashi, N. Furutake, Naoya Inoue, 2008 .

Overview of Materials Processing and Properties of Lanthanum-Based High-k Dielectrics

Daniel J. Lichtenwalner, Jesse S. Jur, Angus I. Kingon, 2007 .

Porous Low-$k$ Impacts on Performance of Advanced LSI Devices with GHz Operations

T. Fukai, Yoshihiro Hayashi, Munehiro Tada, 2009 .