Yasuyuki Matsuya

发表

1 V Power Supply, Low-Power Consumption AD Conversion Technique

Junzo Yamada, Yasuyuki Matsuya, 1994 .

TP 11 4: 1V Power Slupply, 384kds 10b AID and DIA Converters with Swing-Suppression Noise Shaping

Junzo Yamada, Yasuyuki Matsuya, 1993 .

Preamplifier Reducing Kickback Noise for Full Differential Comparator

Toshio Kobayashi, Yasuyuki Matsuya, Shintaro Ichitsubo, 2009 .

High-linearity and high-speed CMOS 1-chip A/D, D/A converters. all-digital linearity error correction (LECS)

Yasuyuki Matsuya, Yukio Akazawa, Atsushi Iwata, 1987 .

Ultralow-power CMOS/SOI Circuit Technology

Tsuneo Tsukahara, Takakuni Douseki, Yasuyuki Matsuya, 2006 .

A 2‐V, 1‐MHz, 7‐bit, third‐order noise shaping A‐D converter

Jun Terada, Yasuyuki Matsuya, 2001 .

1V,10MHz High-Speed Digital Circuit Technology with Multi- Threshold CMOS

Shin'ichiro Mutoh, Junzo Yamada, Takakuni Douseki, 1993 .

Ultralow-power CMOS/SOI circuit technology

Tsuneo Tsukahara, Takakuni Douseki, Yasuyuki Matsuya, 2008 .

Special section on analog circuit techniques and related topics

Hiroo Sekiya, Akira Hyogo, Hiroki Ishikuro, 2021 .