Ramaswami Dandapani

Integration of IEEE STD.11149.1 and mixed-signal test architectures

David J. Cheek, Ramaswami Dandapani, R. Dandapani, 1995, Proceedings of 1995 IEEE International Test Conference (ITC).

Testable Design of Single-Output Sequential Machines Using Checking Experiments

Kewal K. Saluja, Ramaswami Dandapani, K. Saluja, 1986, IEEE Transactions on Computers.

An implementation of IEEE 1149.1 to avoid timing violations and other practical in-compliance improvements

Ramaswami Dandapani, Dave Stang, 2002, Proceedings. International Test Conference.

Coverage metrics for functional tests

Ramaswami Dandapani, John R. Wallack, R. Dandapani, 1994, Proceedings of IEEE VLSI Test Symposium.

Derivation of Minimal Test Sets for Monotonic Logic Circuits

Ramaswami Dandapani, R. Dandapani, 1973, IEEE Transactions on Computers.

Structure and metrology for a single-wire analog testability bus

Ramaswami Dandapani, Weiwei Mao, Ravi K. Gulati, 1994, Proceedings., International Test Conference.

Built-in self-test for large embedded CMOS folded PLAs

Ramaswami Dandapani, Ravi K. Gulati, Deepak K. Goel, 1988, [1988] IEEE International Conference on Computer-Aided Design (ICCAD-89) Digest of Technical Papers.

Design of Test Pattern Generators for Built-In Test

Janak H. Patel, Jacob A. Abraham, Ramaswami Dandapani, 1984, ITC.

The Bachelor of Innovation™ Family of Degrees: Transforming Education in Engineering to Education in Innovation

Ramaswami Dandapani, Gregory N. Stock, Terrance Boult, 2010, 2010 IEEE Transforming Engineering Education: Creating Interdisciplinary Skills for Complex Global Environments.

Hard faults diagnosis in analog circuits using sensitivity analysis

Ramaswami Dandapani, Yunsheng Lu, 1993, Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium.

An Alternative to Scan Design Methods for Sequential Machines

Kewal K. Saluja, Ramaswami Dandapani, 1986, IEEE Transactions on Computers.