Chuan Seng Tan

发表

Yield Enhancement of Face-to-Face Cu–Cu Bonding With Dual-Mode Transceivers in 3DICs

Tony Tae-Hyoung Kim, Myat Thu Linn Aung, Takefumi Yoshikawa, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Fine-pitch bump-less Cu-Cu bonding for wafer-on-wafer stacking and its quality enhancement

Hongyu Li, Dim-Lee Kwong, Chuan Seng Tan, 2010, 2010 IEEE International 3D Systems Integration Conference (3DIC).

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration

Chuan Seng Tan, J. Fan, 2012 .

Design for reliability through engineering optimization

Chuan Seng Tan, Kin Leong Pey, Wee Loon Ng, 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

Impact of thermal through silicon via (TTSV) on the temperature profile of multi-layer 3-D device stack

Chuan Seng Tan, Shiv Govind Singh, 2009, 2009 IEEE International Conference on 3D System Integration.

The dependency of TSV keep-out zone (KOZ) on Si crystal direction and liner material

J. Zhang, Cher Ming Tan, L. Zhang, 2013, 2013 IEEE International 3D Systems Integration Conference (3DIC).

Achieving low temperature Cu to Cu diffusion bonding with self assembly monolayer (SAM) passivation

Chuan Seng Tan, Jun Wei, Dau Fatt Lim, 2009, 2009 IEEE International Conference on 3D System Integration.

Design Considerations and Fabrication Challenges of Surface Electrode Ion Trap with TSV Integration

Chuan Seng Tan, Anak Agung Alit Apriyana, Peng Zhao, 2019, 2019 International 3D Systems Integration Conference (3DIC).

Online Condition Monitoring System for DC-Link Capacitor in Industrial Power Converters

Mohd Tariq, Chuan Seng Tan, Rejeki Simanjorang, 2018, IEEE Transactions on Industry Applications.

Copper micro and nano particles mixture for 3D interconnections application

Chee Lip Gan, Chuan Seng Tan, Yuan Yuan Dai, 2015, 2015 International 3D Systems Integration Conference (3DIC).

Monolithic CMOS-MEMS integration for high-g accelerometers

Chuan Seng Tan, Vinayak Narasimhan, Holden Li, 2014, Security and Defence.

Low cost rapid fabrication of vertical LVOF microspectrometer on-chip for MIR sensing

Chengkuo Lee, Nan Chen, Beng Kang Tay, 2018, Commercial + Scientific Sensing and Imaging.

Three-Dimensional Integration of Integrated Circuits - an Introduction

Chuan Seng Tan, C. S. Tan, 2011, 3D Integration for NoC-based SoC Architectures.

Integration schemes and enabling technologies for three-dimensional integrated circuits

Chuan Seng Tan, Kuan-Neng Chen, Kuan-Neng Chen, 2011, IET Comput. Digit. Tech..

Non-destructive degradation study of copper wire bond for its temperature cycling reliability evaluation

Cher Ming Tan, Chuan Seng Tan, Kheng Chooi Lee, 2016, Microelectron. Reliab..

TiN Guard Ring Around TSV for Cross-Talk Suppression of Parallel Networking of Data Center

Chuan Seng Tan, Alit Apriyana Anak Agung, Peng Zhao, 2019, 2019 International 3D Systems Integration Conference (3DIC).

AlN-AlN Layer Bonding and Its Thermal Characteristics

Chuan Seng Tan, Gang Yih Chong, S. Bao, 2014 .

Simulation and design of AIN piezoelectric resonator for infrared sensing application utilizing lamb wave mode

Chuan Seng Tan, Alex Yuandong Gu, Wan Chia Ang, 2014, 2014 IEEE Ninth International Conference on Intelligent Sensors, Sensor Networks and Information Processing (ISSNIP).

Guest Editorial Special Section on the Second Electron Devices Technology and Manufacturing (EDTM) Conference 2019

Nagarajan Raghavan, Chuan Seng Tan, Hang Tong Edwin Teo, 2019 .

3D integration of MEMS and CMOS via Cu-Cu bonding with simultaneous formation of electrical, mechanical and hermetic bonds

Chuan Seng Tan, Ji Fan, Holden King Ho Li, 2012, 2011 IEEE International 3D Systems Integration Conference (3DIC), 2011 IEEE International.

A self-aligned dry etching method for mechanical strain enhancement of germanium and its uniformity improvement for photonic applications

Chuan Seng Tan, Jurgen Michel, Danhao Ma, 2018, OPTO.

Technology and applications of three-dimensional integration

Nisha Checka, Chuan Seng Tan, Rafael Reif, 2004 .

Thermal-reliable 3D clock-tree synthesis considering nonlinear electrical-thermal-coupled TSV model

Chun Zhang, Hao Yu, Yang Shang, 2013, 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC).

Physical Design for 3D Integrated Circuits

Chuan Seng Tan, Aida Todri-Sanial, 2015 .

Technology, performance, and computer-aided design of three-dimensional integrated circuits

Nisha Checka, Chuan Seng Tan, Shamik Das, 2004, ISPD '04.

The integration of InGaP LEDs with CMOS on 200 mm silicon wafers

Kenneth Eng Kian Lee, Soon Fatt Yoon, Chuan Seng Tan, 2017, OPTO.

Robust Electromigration reliability through engineering optimization

Chuan Seng Tan, Kin Leong Pey, Oliver Aubel, 2014, Microelectron. Reliab..

3D Integration for VLSI Systems

Chuan Seng Tan, Kuan-Neng Chen, Steven J. Koester, 2011 .

Condition Monitoring of DC-Link Capacitors Using Goertzel Algorithm for Failure Precursor Parameter and Temperature Estimation

Frede Blaabjerg, Josep Pou, Chuan Seng Tan, 2020, IEEE Transactions on Power Electronics.

Overview of Wafer-Level 3D ICs

Ronald J. Gutmann, Chuan Seng Tan, L. Rafael Reif, 2008 .

Metal-semiconductor-metal photodetectors on a GeSn-on-insulator platform

Wei Li, Chuan Seng Tan, Joe Margetis, 2019, OPTO.

Multi-layer 3D silicon electronics enabled by wafer bonding

Chuan Seng Tan, C. S. Tan, 2006 .

Through-substrate via (TSV) with embedded capacitor as an on-chip energy storage element

Chuan Seng Tan, Ye Lin, C. S. Tan, 2016, 2016 IEEE International 3D Systems Integration Conference (3DIC).

Red InGaP light-emitting diodes epitaxially grown on engineered Ge-on-Si substrates

Kenneth Eng Kian Lee, Soon Fatt Yoon, Chuan Seng Tan, 2016, SPIE OPTO.

Reliable 3-D Clock-Tree Synthesis Considering Nonlinear Capacitive TSV Model With Electrical–Thermal–Mechanical Coupling

Hao Yu, Yang Shang, Sung Kyu Lim, 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Comparative Studies of the Growth and Characterization of Germanium Epitaxial Film on Silicon (001) with 0° and 6° Offcut

Chuan Seng Tan, Eugene A. Fitzgerald, C. S. Tan, 2013, Journal of Electronic Materials.

Implementation of carbon nanotube bundles in sub-5 micron diameter through-silicon-via structures for three-dimensionally stacked integrated circuits

Chuan Seng Tan, C. S. Tan, Kaushik Ghosh, 2015 .

GeSn-on-insulator substrate formed by direct wafer bonding

Chuan Seng Tan, Wei Wang, Bing Wang, 2016 .

Germanium-on-silicon nitride waveguides for mid-infrared integrated photonics

Richard A. Soref, Ting Hu, Chuan Seng Tan, 2016 .

Integration of GaAs, GaN, and Si-CMOS on a common 200 mm Si substrate through multilayer transfer process

Chuan Seng Tan, Eugene A. Fitzgerald, Li Zhang, 2016 .

Hetero-epitaxy of high quality germanium film on silicon substrate for optoelectronic integrated circuit applications

Wei Li, Chuan Seng Tan, Jurgen Michel, 2017 .

Low Temperature Cu-to-Cu Bonding for Wafer-Level Hermetic Encapsulation of 3D Microsystems

Chuan Seng Tan, D. F. Lim, Kwok Hung Li, 2011 .

High-performance GeSn photodetector and fin field-effect transistor (FinFET) on an advanced GeSn-on-insulator platform.

Wei Wang, Chuan Seng Tan, Shengqiang Xu, 2018, Optics express.

Integration of III–V materials and Si-CMOS through double layer transfer process

Chuan Seng Tan, Shuyu Bao, C. S. Tan, 2014, 2014 4th IEEE International Workshop on Low Temperature Bonding for 3D Integration (LTB-3D).

Microelectronics Thin Film Handling and Transfer Using Low-Temperature Wafer Bonding

Chuan Seng Tan, Rafael Reif, 2005 .

Monolithic integration of III–V HEMT and Si-CMOS through TSV-less 3D wafer stacking

Chuan Seng Tan, David Kohen, Shuyu Bao, 2015, 2015 IEEE 65th Electronic Components and Technology Conference (ECTC).

High throughput Cu-Cu bonding by non-thermo-compression method

Chuan Seng Tan, Gang Yih Chong, C. S. Tan, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Effects of surface treatment on the bonding quality of wafer-level Cu-to-Cu thermo-compression bonding for 3D integration

Chuan Seng Tan, D. F. Lim, Ji Fan, 2013 .

Effect of direct current stressing to Cu-Cu bond interface imperfection for three dimensional integrated circuits

Chee Lip Gan, Chuan Seng Tan, Riko I Made, 2013 .

Growth and characterization of germanium epitaxial film on silicon (001) using reduced pressure chemical vapor deposition

Chuan Seng Tan, C. S. Tan, Yew Heng Tan, 2012 .

High-efficiency normal-incidence vertical p - i - n photodetectors on a germanium-on-insulator platform

Chuan Seng Tan, Jurgen Michel, Hong Wang, 2017 .

3-D Interconnects Using Cu Wafer Bonding : Technology and Applications

Nisha Checka, Chuan Seng Tan, Rafael Reif, 2004 .

Application of self assembly monolayer (SAM) in lowering the process temperature during Cu-Cu diffusion bonding of 3D IC

Chuan Seng Tan, Dau Fatt Lim, Xiao Fang Ang, 2009, 2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference.

The GaAs/GaAs/Si solar cell – Towards current matching in an integrated two terminal tandem

Haohui Liu, Ian Marius Peters, Chuan Seng Tan, 2017 .

Integration of III–V materials and Si-CMOS through double layer transfer process

Chuan Seng Tan, Eugene A. Fitzgerald, Shuyu Bao, 2015 .

Thermocompression Cu ? Cu Bonding of Blanket and Patterned Wafers

Chuan Seng Tan, Kuan-Neng Chen, C. S. Tan, 2012 .

Process development and bonding quality investigations of silicon layer stacking based on copper wafer bonding

Chuan Seng Tan, Rafael Reif, Kuan-Neng Chen, 2005 .

Three-Dimensional Wafer Stacking Using Cu–Cu Bonding for Simultaneous Formation of Electrical, Mechanical, and Hermetic Bonds

Chuan Seng Tan, Lan Peng, Shan Gao, 2012, IEEE Transactions on Device and Materials Reliability.

High-Density 3-D Interconnect of Cu–Cu Contacts With Enhanced Contact Resistance by Self-Assembled Monolayer (SAM) Passivation

Chuan Seng Tan, Dau Fatt Lim, Lan Peng, 2011, IEEE Transactions on Electron Devices.

Ultrafine Pitch (6 $\mu\hbox{m}$) of Recessed and Bonded Cu–Cu Interconnects by Three-Dimensional Wafer Stacking

Chuan Seng Tan, Dau Fatt Lim, Lan Peng, 2012, IEEE Electron Device Letters.

Mitigating heat dissipation and thermo-mechanical stress challenges in 3-D IC using thermal through silicon via (TTSV)

Santhosh Onkaraiah, Chuan Seng Tan, C. S. Tan, 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

PE-TEOS Wafer Bonding Enhancement at Low Temperature with a High- κ Dielectric Capping Layer of Al2O3

Chuan Seng Tan, C. S. Tan, G. Y. Chong, 2011 .

Observation of interfacial void formation in bonded copper layers

Chuan Seng Tan, Rafael Reif, S. Pozder, 2005 .

Study of the evolution of Cu-Cu bonding interface imperfection under direct current stressing for three dimensional integrated circuits

Chee Lip Gan, Chuan Seng Tan, Riko I Made, 2011, 2011 IEEE International Interconnect Technology Conference.

Reliability evaluation of copper (Cu) through-silicon via (TSV) barrier and dielectric liner by electrical characterization

Chuan Seng Tan, Werner Kanert, Jiawei Marvin Chan, 2016, 2016 IEEE 18th Electronics Packaging Technology Conference (EPTC).

Cu–Cu Bond Quality Enhancement Through the Inclusion of a Hermetic Seal for 3-D IC

Chuan Seng Tan, Lan Peng, Lin Zhang, 2013, IEEE Transactions on Electron Devices.

Thermal mitigation using thermal through silicon via (TTSV) in 3-D ICs

Chuan Seng Tan, C. S. Tan, S. Govind Singh, 2009, 2009 4th International Microsystems, Packaging, Assembly and Circuits Technology Conference.

Silicon Layer Stacking Enabled by Wafer Bonding

Chuan Seng Tan, Rafael Reif, Kuan-Neng Chen, 2006 .

Wafer-level hermetic packaging of 3D microsystems with low-temperature Cu-to-Cu thermo-compression bonding and its reliability

Chuan Seng Tan, Lan Peng, Kwok Hung Li, 2012 .

The role of AsH3 partial pressure on anti-phase boundary in GaAs-on-Ge grown by MOCVD – Application to a 200 mm GaAs virtual substrate

Soon Fatt Yoon, Chuan Seng Tan, Eugene A. Fitzgerald, 2015 .

Cu-Cu diffusion bonding enhancement at low temperature by surface passivation using self-assembled monolayer of alkane-thiol

Chuan Seng Tan, Dau Fatt Lim, Magnus Bergkvist, 2009 .

Through Silicon Via Fabrication with Low-κ Dielectric Liner and Its Implications on Parasitic Capacitance and Leakage Current

Chuan Seng Tan, Lin Zhang, D. F. Lim, 2012 .

Silicon Multilayer Stacking Based on Copper Wafer Bonding

Chuan Seng Tan, Rafael Reif, C. S. Tan, 2005 .

(Invited) Cu Surface Passivation with Self-Assembled Monolayer (SAM) and Its Application for Wafer Bonding at Moderately Low Temperature

Chuan Seng Tan, Dau Fatt Lim, D. F. Lim, 2013 .

Study of Near-Surface Stresses in Silicon Around Through-Silicon Vias at Elevated Temperatures by Raman Spectroscopy and Simulations

Chuan Seng Tan, Jiye Zhang, Guangrui Xia, 2015, IEEE Transactions on Device and Materials Reliability.

Defects reduction of Ge epitaxial film in a germanium-on-insulator wafer by annealing in oxygen ambient

Chuan Seng Tan, Gang Yih Chong, Eugene A. Fitzgerald, 2015 .

Optical design considerations of rear-side dielectric for higher efficiency of PERC solar cells.

Chuan Seng Tan, Armin G. Aberle, Cangming Ke, 2019, Optics express.

Fabrication and characterization of germanium-on-insulator through epitaxy, bonding, and layer transfer

Chuan Seng Tan, Gang Yih Chong, Eugene A. Fitzgerald, 2014 .

Reduction of threading dislocation density in Ge/Si using a heavily As-doped Ge seed layer

Soon Fatt Yoon, Chuan Seng Tan, Bing Wang, 2016 .

Copper bonded layers analysis and effects of copper surface conditions on bonding quality for three-dimensional integration

Chuan Seng Tan, Rafael Reif, Kuan-Neng Chen, 2005 .

Physical and Electrical Characterization of 3D Embedded Capacitor: A High-Density MIM Capacitor Embedded in TSV

Chuan Seng Tan, C. S. Tan, Ye Lin, 2017, 2017 IEEE 67th Electronic Components and Technology Conference (ECTC).

Abnormal contact resistance reduction of bonded copper interconnects in three-dimensional integration during current stressing

Chuan Seng Tan, Rafael Reif, Kuan-Neng Chen, 2005 .

Low Temperature Wafer Bonding of Low- κ Carbon-Doped Oxide for Application in 3D Integration

Chuan Seng Tan, G. Y. Chong, 2010 .

Wafer-on-Wafer Stacking by Bumpless Cu–Cu Bonding and Its Electrical Characteristics

Chuan Seng Tan, Dau Fatt Lim, Lan Peng, 2011, IEEE Electron Device Letters.

Modeling, Fabrication, and Characterization of 3-D Capacitor Embedded in Through-Silicon Via

Chuan Seng Tan, C. S. Tan, Ye Lin, 2018, IEEE Transactions on Components, Packaging and Manufacturing Technology.

Spiral Waveguides on Germanium-on-Silicon Nitride Platform for Mid-IR Sensing Applications

Richard A. Soref, Wei Li, Chuan Seng Tan, 2018, IEEE Photonics Journal.

Low temperature bump-less Cu-Cu bonding enhancement with self assembled monolayer (SAM) passivation for 3-D integration

Chuan Seng Tan, Dau Fatt Lim, Chee Mang Ng, 2010, 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC).

Graphene–CNT hetero-structure for next generation interconnects

Chuan Seng Tan, C. S. Tan, N. Ranjan, 2016 .