Vasilis F. Pavlidis

发表

Temperature-Aware Optimization of Monolithic 3D Deep Neural Network Accelerators

Emre Salman, Ayse K. Coskun, Prachi Shukla, 2020, 2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC).

Chapter 7 – Interconnect Prediction Models

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Fabrication Cost Analysis for Contactless 3-D ICs

Vasilis F. Pavlidis, Ioannis A. Papistas, Dimitrios Velenis, 2019, IEEE Transactions on Circuits and Systems II: Express Briefs.

Comparative study of crosstalk noise due to inductive links on heterogeneous 3-D ICs

Vasilis F. Pavlidis, Ioannis A. Papistas, V. Pavlidis, 2017, 2017 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization for RF, Microwave, and Terahertz Applications (NEMO).

Thermal Management Techniques

Eby G. Friedman, Vasilis F. Pavlidis, 2009 .

Variability Issues in Three-Dimensional ICs

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Voltage propagation method for 3-D power grid analysis

Giovanni De Micheli, Cheng Zhang, Vasilis F. Pavlidis, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Synchronization in Three-Dimensional ICs

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Energy-Efficient Time-Based Adaptive Encoding for Off-Chip Communication

Vasilis F. Pavlidis, Eleni Maragkoudaki, V. Pavlidis, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Physical Analysis of NoC Topologies for 3-D Integrated Systems

Eby G. Friedman, Vasilis F. Pavlidis, 2011, 3D Integration for NoC-based SoC Architectures.

Adaptive Transient Leakage-Aware Linearised Model for Thermal Analysis of 3-D ICs

Vasilis F. Pavlidis, Milan D. Mihajlovic, Chao Zhang, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Thermal Management Strategies for Three-Dimensional ICs

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Adaptive Word Reordering for Low-Power Inter-Chip Communication

Przemyslaw Mroszczyk, Vasilis F. Pavlidis, Eleni Maragkoudaki, 2019, 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Process-induced skew variation for scaled 2-D and 3-D ICs

Giovanni De Micheli, Hu Xu, Vasilis F. Pavlidis, 2010, SLIP '10.

Nanoscale Room-Temperature Multilayer Skyrmionic Synapse for Deep Spiking Neural Networks

Steve Furber, Vasilis F. Pavlidis, Christoforos Moutafis, 2020, Physical Review Applied.

Manufacturing of 3-D Packaged Systems

Eby G. Friedman, Vasilis F. Pavlidis, 2009 .

A software-supported methodology for designing high-performance 3D FPGA architectures

Dimitrios Soudris, Kostas Siozios, Vasilis F. Pavlidis, 2007, 2007 IFIP International Conference on Very Large Scale Integration.

Efficient Modeling of Crosstalk Noise on Power Distribution Networks for Contactless 3-D ICs

Vasilis F. Pavlidis, Ioannis A. Papistas, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

Effect of process variations in 3D global clock distribution networks

Giovanni De Micheli, Hu Xu, Vasilis F. Pavlidis, 2012, JETC.

Physical design tradeoffs in power distribution networks for 3-D ICs

Giovanni De Micheli, Vasilis F. Pavlidis, Ioannis Tsioutsios, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

Inter-Plane Communication Methods for 3-D ICs

Giovanni De Micheli, Somayyeh Rahimian Omam, Vasilis F. Pavlidis, 2012, J. Low Power Electron..

Cost Considerations for Three-Dimensional Integration

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Clock Distribution Networks in 3-D Integrated Systems

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Case Study: 3-D Power Distribution Topologies and Models

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory

Rolf Drechsler, Chip-Hong Chang, Chulwoo Kim, 2019, IEEE Trans. Very Large Scale Integr. Syst..

Interconnect delay minimization through interlayer via placement in 3-D ICs

Eby G. Friedman, Vasilis F. Pavlidis, E. Friedman, 2005, ACM Great Lakes Symposium on VLSI.

Exploring Alternative 3D FPGA Architectures: Design Methodology and CAD Tool Support

Dimitrios Soudris, Kostas Siozios, Vasilis F. Pavlidis, 2007, 2007 International Conference on Field Programmable Logic and Applications.

Application performance improvement by exploiting process variability on FPGA devices

Dimitrios Soudris, Kostas Siozios, Vasilis F. Pavlidis, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

Computationally efficient standard-cell FEM-based thermal analysis

Yi-Chung Chen, Vasilis F. Pavlidis, Scott Ladenheim, 2017, 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

3.5-D integration: A case study

Giovanni De Micheli, Pierre-Emmanuel Gaillardon, Vasilis F. Pavlidis, 2013, 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013).

Energy Efficiency of Low Swing Signaling for Emerging Interposer Technologies

Przemyslaw Mroszczyk, Vasilis F. Pavlidis, Eleni Maragkoudaki, 2018, 2018 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).

A methodology for implementing FIR filters and CAD tool development for designing RNS-based systems

Dimitrios Soudris, Adonios Thanailakis, Konstantinos Tatas, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

Efficient teaching of digital design with automated assessment and feedback

Jeffrey Pepper, Vasilis F. Pavlidis, Paul W. Nutter, 2014, 10th European Workshop on Microelectronics Education (EWME).

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics): Preface

Manuel Prieto, Vasilis F. Pavlidis, José L. Ayala, 2011, PATMOS 2011.

Enhanced wafer matching heuristics for 3-D ICs

Giovanni De Micheli, Hu Xu, Vasilis F. Pavlidis, 2012, 2012 17th IEEE European Test Symposium (ETS).

Timing Optimization for Multiterminal Interconnects

Eby G. Friedman, Vasilis F. Pavlidis, 2009 .

Interconnect-Based Design Methodologies for Three-Dimensional

Eby G. Friedman, Vasilis F. Pavlidis, E. Friedman, 2009 .

Three-Dimensional ICs with Inductive Links

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

A Low-Overhead Method for Pre-bond Test of Resonant 3-D Clock Distribution Networks

Giovanni De Micheli, Vasilis F. Pavlidis, Somayyeh Rahimian, 2012 .

Synchronization and power integrity issues in 3-D ICs

Giovanni De Micheli, Hu Xu, Vasilis F. Pavlidis, 2010, 2010 IEEE Asia Pacific Conference on Circuits and Systems.

Cost Modeling and Analysis of TSV and Contactless 3D-ICs

Vasilis F. Pavlidis, Ioannis A. Papistas, Minmin Jiang, 2020, ACM Great Lakes Symposium on VLSI.

Analytical heat transfer model for thermal through-silicon vias

Giovanni De Micheli, Hu Xu, Vasilis F. Pavlidis, 2011, 2011 Design, Automation & Test in Europe.

Chapter 20 – 3-D Circuit Architectures

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Clock distribution models of 3-D integrated systems

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

Interconnect Prediction Models

Eby G. Friedman, Vasilis F. Pavlidis, 2009 .

Chapter 8 – Timing Optimization for Multiterminal Interconnects

Eby G. Friedman, Vasilis F. Pavlidis, 2009 .

Performance analysis of 3-D monolithic integrated circuits

Giovanni De Micheli, Olivier Thomas, Perrine Batude, 2010, 2010 IEEE International 3D Systems Integration Conference (3DIC).

Designing low-power energy recovery adders based on pass transistor logic

Dimitrios Soudris, Vasilis F. Pavlidis, Adonios Thanailakis, 2001, ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483).

3-D Topologies for Networks-on-Chip

Eby G. Friedman, Vasilis F. Pavlidis, E. Friedman, 2006, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Timing Uncertainty in 3-D Clock Trees Due to Process Variations and Power Supply Noise

Giovanni De Micheli, Wayne P. Burleson, Hu Xu, 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Ultra-low swing CMOS transceiver for 2.5-D integrated systems

Przemyslaw Mroszczyk, Vasilis F. Pavlidis, 2018, 2018 19th International Symposium on Quality Electronic Design (ISQED).

ViaPlacement forMinimumInterconnect Delayin Three-Dimensional (3-D) Circuits

Vasilis F. Pavlidis, 2006 .

Case Study: Thermal Coupling in 3-D Integrated Circuits

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

A novel framework for exploring 3-D FPGAs with heterogeneous interconnect fabric

Dimitrios Soudris, Kostas Siozios, Vasilis F. Pavlidis, 2012, TRETS.

Chapter 11 – Timing Optimization for Multiterminal Interconnects*

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

PVT-Aware Sensing and Voltage Scaling for Energy Efficient FPGAs

Dimitrios Soudris, Vasilis F. Pavlidis, Konstantinos Maragos, 2019, FPGA.

Mismatch Compensation Technique for Inverter-Based CMOS Circuits

Przemyslaw Mroszczyk, Vasilis F. Pavlidis, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

Physical Design Techniques for 3-D ICs

Eby G. Friedman, Vasilis F. Pavlidis, 2009 .

Zero-skew Clock Network Synthesis for Monolithic 3D ICs with Minimum Wirelength

Wei Wang, Vasilis F. Pavlidis, Yuanqing Cheng, 2020, ACM Great Lakes Symposium on VLSI.

Manufacturing Technologies for Three-Dimensional Integrated Circuits

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Contactless Heterogeneous 3-D ICs for Smart Sensing Systems

Vasilis F. Pavlidis, Ioannis A. Papistas, 2018, Integr..

Power distribution paths in 3-D ICS

Giovanni De Micheli, Vasilis F. Pavlidis, 2009, GLSVLSI '09.

Physical Design Techniques for Three-Dimensional ICs

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Three-dimensional Integrated Circuit Design

Eby G. Friedman, Vasilis F. Pavlidis, E. Friedman, 2008 .

Metal Stack and Partitioning Exploration for Monolithic 3D ICs

Christos P. Sotiriou, Vasilis F. Pavlidis, Nikolaos K. Sketopoulos, 2020, 2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

Efficient Linear System Solution Techniques in the Simulation of Large Dense Mutually Inductive Circuits

Nestor Evmorfopoulos, Vasilis F. Pavlidis, Georgios Stamoulis, 2019, 2019 IEEE 37th International Conference on Computer Design (ICCD).

Skew variability in 3-D ICs with multiple clock domains

Giovanni De Micheli, Hu Xu, Vasilis F. Pavlidis, 2011, 2011 IEEE International Symposium of Circuits and Systems (ISCAS).

The combined effect of process variations and power supply noise on clock skew and jitter

Giovanni De Micheli, Wayne P. Burleson, Hu Xu, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

Via placement for minimum interconnect delay in three-dimensional (3D) circuits

Eby G. Friedman, Vasilis F. Pavlidis, E. Friedman, 2006, 2006 IEEE International Symposium on Circuits and Systems.

Case Study: Clock Distribution Networks for 3-D ICs

Eby G. Friedman, Vasilis F. Pavlidis, 2009 .

Timing-driven via placement heuristics for three-dimensional ICs

Eby G. Friedman, Vasilis F. Pavlidis, 2008, Integr..

Repeater Insertion for Two-Terminal Nets in Three-Dimensional Integrated Circuits

Giovanni De Micheli, Hu Xu, Vasilis F. Pavlidis, 2009, NanoNet.

Chapter 10 – Timing Optimization for Two-Terminal Interconnects*

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Advanced circuit interface for systems with multiple voltage domains

Vasilis F. Pavlidis, John Goodacre, Harry Kalargaris, 2016, 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).

An Enhanced Design Methodology for Resonant Clock Trees

Giovanni De Micheli, Xifan Tang, Somayyeh Rahimian Omam, 2013, J. Low Power Electron..

Power Delivery for Three-Dimensional ICs

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

A software-supported methodology for exploring interconnection architectures targeting 3-D FPGAs

Dimitrios Soudris, Kostas Siozios, Vasilis F. Pavlidis, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

The MTA: An Advanced and Versatile Thermal Simulator for Integrated Systems

Yi-Chung Chen, Vasilis F. Pavlidis, Scott Ladenheim, 2018, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Voltage scaling for 3-D ICs: When, how, and how much?

Vasilis F. Pavlidis, Harry Kalargaris, V. Pavlidis, 2017, Microelectron. J..

Interconnect-Based Design Methodologies for Three-Dimensional Integrated Circuits

Eby G. Friedman, Vasilis F. Pavlidis, E. Friedman, 2009, Proceedings of the IEEE.

Physical Design Issues in 3-D Integrated Technologies

Eby G. Friedman, Vasilis F. Pavlidis, E. Friedman, 2008, VLSI-SoC.

Interconnect design tradeoffs for silicon and glass interposers

Vasilis F. Pavlidis, Harry Kalargaris, 2014, 2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS).

Bandwidth-to-area comparison of through silicon vias and inductive links for 3-D ICs

Vasilis F. Pavlidis, Ioannis A. Papistas, 2015, 2015 European Conference on Circuit Theory and Design (ECCTD).

Crosstalk noise effects of on-chip inductive links on power delivery networks

Vasilis F. Pavlidis, Ioannis A. Papistas, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

3-D Circuit Architectures

Eby G. Friedman, Vasilis F. Pavlidis, E. Friedman, 2009 .

An Overview of Thermal Challenges and Opportunities for Monolithic 3D ICs

Emre Salman, Vasilis F. Pavlidis, Ayse K. Coskun, 2019, ACM Great Lakes Symposium on VLSI.

Clock distribution networks for 3-D ictegrated Circuits

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2008, 2008 IEEE Custom Integrated Circuits Conference.

Manufacturing of Three-Dimensional Packaged Systems

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation - 21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011. Proceedings

Vasilis F. Pavlidis, José L. Ayala, Manuel Prieto, 2011, PATMOS.

Case Study: Clock Distribution Networks for Three-Dimensional ICs

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

3-D Topologies for Networks-on-Chip

Eby G. Friedman, Vasilis F. Pavlidis, 2007, IEEE Trans. Very Large Scale Integr. Syst..

STA compatible backend design flow for TSV-based 3-D ICs

Yi-Chung Chen, Vasilis F. Pavlidis, Harry Kalargaris, 2017, 2017 18th International Symposium on Quality Electronic Design (ISQED).

Design of Resonant Clock Distribution Networks for 3-D Integrated Circuits

Giovanni De Micheli, Somayyeh Rahimian Omam, Vasilis F. Pavlidis, 2011, PATMOS.

Three-Dimensional Integrated Circuit Design, 2nd Edition

Eby G. Friedman, Vasilis F. Pavlidis, Ioannis Savidis, 2017 .

Contactless inter-tier communication for heterogeneous 3-D ICs

Vasilis F. Pavlidis, Ioannis A. Papistas, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Inter-tier crosstalk noise on power delivery networks for 3-D ICs with inductively-coupled interconnects

Vasilis F. Pavlidis, Ioannis A. Papistas, V. Pavlidis, 2016, 2016 International Great Lakes Symposium on VLSI (GLSVLSI).

IC thermal analyzer for versatile 3-D structures using multigrid preconditioned Krylov methods

Yi-Chung Chen, Vasilis F. Pavlidis, Scott Ladenheim, 2016, 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Chapter 11 – Conclusions

Eby G. Friedman, Vasilis F. Pavlidis, 2009 .

Monolithic 3D Integrated Circuits: Recent Trends and Future Prospects

Emre Salman, Prachi Shukla, Vasilis F. Pavlidis, 2021, IEEE Transactions on Circuits and Systems II: Express Briefs.

Design of compact LC lowpass filters based on coaxial through-silicon vias array

Fengjuan Wang, Vasilis F. Pavlidis, Qijun Lu, 2021, Microelectron. J..

A PWM-free DC-DC Boost Converter with 0.43 V Input for Extended Battery Use in IoT Applications

Vasilis F. Pavlidis, Andreas Tsiougkos, 2021, 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS).

Performance-Aware Interconnect Delay Insertion Against EM Side-Channel Attacks

Vasilis F. Pavlidis, Minmin Jiang, 2021, 2021 ACM/IEEE International Workshop on System Level Interconnect Prediction (SLIP).

TSV-based hairpin bandpass filter for 6G mobile communication applications

Fengjuan Wang, Vasilis F. Pavlidis, Xiangkun Yin, 2021, IEICE Electronics Express.