Shao-Hui Shieh

发表

Berger Code Totally Self-Checking Checker Design for Embedded Adder Cores

Shao-Hui Shieh, Wei-Siou Tong, 2010 .

Low power self-checking two-rail code checker design

Shao-Hui Shieh, 2011, 2011 3rd Asia Symposium on Quality Electronic Design (ASQED).

Low Voltage and Low Power 64-Bit Hybrid Adder Design Based on Radix-4 Prefix Tree Structure

Der-Chen Huang, Shao-Hui Shieh, Ying-Yi Chu, 2014, 2014 International Symposium on Computer, Consumer and Control.

Design of the FPGA Chip for Error Correcting Hamming Code

Chen-Chung Liu, Wen-Yuan Chen, Shao-Hui Shieh, 2005 .

Design High-Performance and Low-Power Adder Cores with Full-Swing Nodes for Embedded Systems

Yu-Cherng Hung, Ching-Hwa Cheng, Shao-Hui Shieh, 2009, 2009 Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

High-Speed CMOS Chip Design for Manchester and Miller Encoder

Yu-Cherng Hung, Shao-Hui Shieh, Chiou-Kou Tung, 2009, 2009 Fifth International Conference on Intelligent Information Hiding and Multimedia Signal Processing.

Low-power high-speed full adder for portable electronic applications

Shao-Hui Shieh, C.-H. Cheng, C.-K. Tung, 2013 .

Fabrication of sol-gel-derived zinc oxide thin-film transistor

Shao-Hui Shieh, Hsin-Chiang You, Chyi-Yau Shao, 2011, 2011 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems.

Totally Self-Checking Carry-Select Adder Design Based on Two-Rail Code

Shao-Hui Shieh, Ming-En Lee, 2010 .

Self-Checking Conditional-Sum Adder Design Based on Two-Rail Encoding Scheme

Shao-Hui Shieh, Yung-Tsan Wang, 2009 .

Fabricating zinc oxide semiconductor device of flexible substrate by using the spin-coating method

Shao-Hui Shieh, Hsin-Chiang You, Chiou-Kou Tung, 2011, 2011 6th IEEE International Conference on Nano/Micro Engineered and Molecular Systems.

A fast signature computation algorithm for LFSR and MISR

Cheng-Wen Wu, Shao-Hui Shieh, Bin-Hong Lin, 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A Regularly Modularized Multiplexer-based Full Adder for Arithmetic Applications

Ching-Hwa Cheng, Shao-Hui Shieh, Chiou-Kou Tung, 2014 .

The Transistor Characteristics of Zinc Oxide Active Layer with Different Thickness of Zinc Oxide Thin-Film

Yu-Hsien Lin, Shao-Hui Shieh, Hsin-Chiang You, 2012, 2012 International Symposium on Computer, Consumer and Control.

An MISR computation algorithm for fast signature simulation

Cheng-Wen Wu, Shao-Hui Shieh, Bin-Hong Lin, 1996, Proceedings of the Fifth Asian Test Symposium (ATS'96).

A survey of low-voltage low-power technique and challenge for CMOS signal processing circuits

Yu-Cherng Hung, Shao-Hui Shieh, Chiou-Kou Tung, 2009, Proceedings of the 2009 12th International Symposium on Integrated Circuits.

A Survey of Low-voltage Low-Power Techniques and Challenges for CMOS Digital Circuits

Yu-Cherng Hung, Shao-Hui Shieh, Chiou-Kou Tung, 2011, J. Circuits Syst. Comput..

Carry-propagation-free adder based on an asymmetric high-radix signed-digit number system

Cheng-Wen Wu, Shao-Hui Shieh, Bin-Hong Lin, 1996 .

A Smart LED Lighting with Multiple Dimming and Temperature Automatic Protection Capabilities

Yu-Cherng Hung, Shao-Hui Shieh, Hao-Ping Chan, 2016, 2016 International Symposium on Computer, Consumer and Control (IS3C).

A novel radix-4 bit-level modular multiplier for fast RSA cryptosystem

Jin-Hua Hong, Shao-Hui Shieh, Bin-Yan Tsai, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

High-Performance Low-Power Full-Swing Full Adder Cores with Output Driving Capability

Ming-Chien Tsai, Yu-Cherng Hung, Shao-Hui Shieh, 2006, APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems.

A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System

Yu-Cherng Hung, Shao-Hui Shieh, Guo-Shing Huang, 2007, 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems.

A Fast Signature Computation Algorithm for LFSR

Cheng-Wen Wu, Shao-Hui Shieh, Bin-Hong Lin, 2000 .

Asymmetric High-Radix Signed-Digit Number Systems for Carry-Free Addition

Cheng-Wen Wu, Shao-Hui Shieh, 2003, J. Inf. Sci. Eng..