S. Nakahara

A design for a minimum Hamming-distance search using asynchronous digital techniques

S. Nakahara, T. Kawata, 2005, IEEE Journal of Solid-State Circuits.

Programmable and automatically-adjustable sense-amplifier activation scheme and multi-reset address-driven decoding scheme for high-speed reusable SRAM core

M. Yoshida, K. Higeta, T. Suzuki, 2002, 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302).

A digital circuit for a minimum distance search using an asynchronous bubble shift memory

S. Nakahara, T. Kawata, 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

Comparison of Performances between IPC Code and RSC Code when Applied to PCM Tape Recorder

S. Kunii, S. Nakahara, K. Tanaka, 1979 .