Jin-fuw Lee

HIMALAYAS - a hierarchical compaction system with a minimized constraint set

Jin-fuw Lee, Donald T. Tang, 1992, ICCAD.

A timing analysis algorithm for circuits with level-sensitive latches

Chak-Kuen Wong, Jin-fuw Lee, Donald T. Tang, 1994, ICCAD '94.

VLSI Layout Compaction with Grid and Mixed Constraints

Jin-fuw Lee, Donald T. Tang, 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A new framework of design rules for compaction of VLSI layouts

Jin-fuw Lee, 1988, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

On the signal bounding problem in timing analysis

Chak-Kuen Wong, Daniel L. Ostapko, Jin-fuw Lee, 2001, IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281).

A performance-aimed cell compactor with automatic jogs

Chak-Kuen Wong, Jin-fuw Lee, 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A Timing Analysis Algorithm For Circuits With Level-sensitive Latches

Chak-Kuen Wong, Jin-fuw Lee, Donald T. Tang, 1994, IEEE/ACM International Conference on Computer-Aided Design.

An Algorithm for Incremental Timing Analysis

Jin-fuw Lee, Donald T. Tang, D. Tang, 1995, 32nd Design Automation Conference.

A layout compaction algorithm with multiple grid constraints

Jin-fuw Lee, 1991, [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors.