Nakano Koji

发表

An Efficient Implementation of the Gradient-based Hough Transform using DSP slices and block RAMs on the FPGA

Zhou Xin, Ito Yasuaki, Nakano Koji, 2014 .

Component Labeling on the FPGA using Few Logic Elements

Ito Yasuaki, Nakano Koji, 2009 .

Theoretical Model of Interconnection Networks Consisting of Hosts and Switches

Amano Hideharu, Nakano Koji, Koibuchi Michihiro, 2016 .

An FPGA Implementation for a 3-layer Perceptron with the FDFM Processor Core Approach

Ito Yasuaki, Nakano Koji, Agou Yuki, 2012 .

GPU-Accelerated Bulk Computation of the Eigenvalue Problem for Many Small Real Non-symmetric Matrices

Ito Yasuaki, Nakano Koji, Tokura Hiroki, 2016 .

Simple Memory Machine Models for GPUs

Nakano Koji, 2012 .

ASCII Art Generation using the Local Exhaustive Search on the GPU

Ito Yasuaki, Nakano Koji, Takafuji Daisuke, 2013 .

A GPU Implementation of Computing the Voronoi Map and the Euclidean Distance Map

Ito Yasuaki, Nakano Koji, Honda Hiroaki, 2017 .

An FPGA-based Tiny Processing System for Small Embedded System and Education

Ito Yasuaki, Nakano Koji, Kawakami Kensuke, 2009 .

A GPU Implementation of Eigenvalue Computation for a Large Number of Matrices

Ito Yasuaki, Nakano Koji, Tokura Hiroki, 2016 .

Bulk Execution of the Dynamic Programming for the Optimal Polygon Triangulation on the GPU

Ito Yasuaki, Nakano Koji, Yamashita Kohei, 2017 .

A Flexible-Length-Arithmetic Processor Using Embedded DSP Slices and Block RAMs in FPGAs

Ito Yasuaki, Nakano Koji, Sai Kohan, 2013 .

A GPU Implementation of Image Generation for Square Pointillism

Ito Yasuaki, Nakano Koji, Tokura Hiroki, 2017 .

An Efficient GPU Implementation of Computing the Summed Area Table

Ito Yasuaki, Nakano Koji, Honda Takumi, 2017 .

TinyCSE: Tiny Computer System for Education

Ito Yasuaki, Nakano Koji, Nakamura Ryosuke, 2013 .

Parallel Algorithms for the Summed Area Table on the Asynchronous Hierarchical Memory Machine, with GPU implementations

Kasagi Akihiko, Ito Yasuaki, Nakano Koji, 2014 .

An implementation of Hough Transform Using DSP blocks and block RAMs on the FPGA

Zhou Xin, Ito Yasuaki, Nakano Koji, 2012 .

Implementations of Parallel Error Diffusion Optimized for GPU

Kasagi Akihiko, Ito Yasuaki, Nakano Koji, 2014 .

An Implementation of Hardware Sorting Algorithms using the FPGA

Zhou Xin, Ito Yasuaki, Nakano Koji, 2016 .

Random Grid Graph for Low-Latency Networks

Fujita Satoshi, Fujiwara Ikki, Matsutani Hiroki, 2016 .

Swapped Random Topologies for Low-latency Interconnection Networks

Fujita Satoshi, Fujiwara Ikki, Nakano Koji, 2014 .

Topology Optimization of 3D-Stacked Chips under Maxiumum Wire Length Constraint

Kawano Ryuta, Nakahara Hiroshi, Koibuchi Michihiro, 2015 .

An Improved Algorithm for Random Topology Generation

Fujita Satoshi, Fujiwara Ikki, Nakano Koji, 2015 .

Template Matching using DSP slices on the FPGA

Ito Yasuaki, Nakano Koji, Hashimoto Kaoru, 2013 .

C2CU : A CUDA C Program Generator for Bulk Execution of a Sequential Algorithm

Ito Yasuaki, Nakano Koji, Takafuji Daisuke, 2014 .

GPU Applications with Single Kernel Synchronization Technique

Ito Yasuaki, Nakano Koji, Funasaka Shunji, 2017 .

Fast Simulation of Conway's Game of Life using the FPGA

Zhou Xin, Ito Yasuaki, Nakano Koji, 2016 .

An RSA Encryption Hardware Algorithm that uses a DSP block on the FPGA

Nakano Koji, Kawakami Kensuke, 2010 .

An Optimal Offline Permutation Algorithm on the Hierarchical Memory Machine, with the GPU implementation

Kasagi Akihiko, Ito Yasuaki, Nakano Koji, 2013 .

An FPGA-based Architecture for Verifying Collatz Conjecture

Ito Yasuaki, Nakano Koji, 2009 .

A GPU Implementation of the Smith-Waterman Algorithm using Bitwise Parallel Bulk Computation Technique

Ito Yasuaki, Nakano Koji, Nishimura Takahiro, 2017 .

An FPGA Implementation of LZW Compression

Zhou Xin, Ito Yasuaki, Nakano Koji, 2016 .

A GPU Implementation of Conflict-Free Offline Permutation

Kasagi Akihiko, Ito Yasuaki, Nakano Koji, 2012 .

An Optimal Parallel Prefix-sums Algorithm on the Memory Machine Models for GPUs

Nakano Koji, 2012 .

A Loss-Less Data Compression Algorithm for GPUs

Ito Yasuaki, Nakano Koji, Funasaka Shunji, 2016 .

A GPU Implementation of the CKY Parsing using Bitwise Parallel Bulk Computation

Ito Yasuaki, Nakano Koji, Fujita Toru, 2016 .

An implementation of high-throughput computing system using the GPU

Ito Yasuaki, Nakano Koji, Tani Kazuya, 2014 .

An Efficient Implementation of Ant Colony Optimization for the Traveling Salesman Problem on the GPU

Ito Yasuaki, Nakano Koji, Uchida Akihiro, 2012 .

An Efficient Implementation of Exhaustive Verification of the Collatz Conjecture using DSP48E blocks of Xilinx Virtex-5 FPGAs

Ito Yasuaki, Nakano Koji, 2010 .

Let's Solve the Order/Degree Problem to Make the Lowest-latency Interconnections

Fujita Satoshi, Fujiwara Ikki, Koibuchi Michihiro, 2015 .