Won-Chang Jung

18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution

Jae-Wook Lee, Reum Oh, Dong-Hak Shin, 2016, ISSCC.

Single-Chip Implementation of a 32-bit Motor-Drive-Specific Microcontroller with Floating-Point Unit (Special Issue on Integrated Electronics and New System Paradigms)

Joo-Hyun Lee, Hong-June Park, Sanghoon Lee, 1999 .

18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution

Reum Oh, Dong-Hak Shin, Jae-Hun Jung, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).