Chun-Yi Liu

FPGA-Based High Area Efficient Time-To-Digital IP Design

Guo-Ruey Tsai, Min-Chuan Lin, Chun-Yi Liu, 2006, TENCON 2006 - 2006 IEEE Region 10 Conference.

FPGA-Based High AreaEfficient Time-To-Digital

Guo-Ruey Tsai, Min-Chuan Lin, Chun-Yi Liu, 2006 .

Dual Mode Phase Noise Cancellation Communication Systems

Wei-Chang Liu, Chih-Feng Wu, Liang-Yu Huang, 2015 .

FPGA-Based High Area Efficient Time-To-Digital

Guo-Ruey Tsai, Min-Chuan Lin, Chun-Yi Liu, 2006 .

Prolonging 3D NAND SSD lifetime via read latency relaxation

Mahmut T. Kandemir, Myoungsoo Jung, Wonil Choi, 2021, ASPLOS.

GSSA: A Resource Allocation Scheme Customized for 3D NAND SSDs

Mahmut T. Kandemir, Chita R. Das, Myoungsoo Jung, 2021, 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA).