Xuan-Tu Tran

发表

Ultra low-power and low-energy 32-bit datapath AES architecture for IoT applications

Edith Beigné, Diego Puschini, Duy-Hieu Bui, 2016, 2016 International Conference on IC Design and Technology (ICICDT).

A Comprehensive Reliability Assessment of Fault-Resilient Network-on-Chip Using Analytical Model

Khanh N. Dang, Xuan-Tu Tran, Akram Ben Ahmed, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Survey of High-Efficiency Context-Addaptive Binary Arithmetic Coding Hardware Implementations in High-Efficiency Video Coding Standard

Xuan-Tu Tran, Dinh-Lam Tran, Viet-Huong Pham, 2019 .

Routing-path tracking and updating mechanism in reconfigurable Network-on-Chips

Xuan-Tu Tran, Hung K. Nguyen, Thi-Thuy Nguyen, 2016, 2016 International Conference on IC Design and Technology (ICICDT).

2D Parity Product Code for TSV online fault correction and detection

Khanh N. Dang, Xuan-Tu Tran, Akram Ben Ahmed, 2020 .

H.264/AVC hardware encoders and low-power features

Edith Beigné, Suzanne Lesecq, Duy-Hieu Bui, 2014, 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

An Asynchronous Power Aware and Adaptive NoC Based Circuit

H. Lhermet, E. Beigne, Xuan-Tu Tran, 2009, IEEE Journal of Solid-State Circuits.

Report on power, thermal and reliability prediction for 3D Networks-on-Chip pdf

Ben A. Abderazek, Khanh N. Dang, Xuan-Tu Tran, 2020, ArXiv.

A Variable Precision Approach for Deep Neural Networks

Xuan-Tu Tran, Xuan-Tuyen Tran, Duy-Anh Nguyen, 2019, 2019 International Conference on Advanced Technologies for Communications (ATC).

An on-Communication Multiple-TSV Defects Detection and Localization for Real-Time 3D-ICs

Akram Ben Ahmed, Khanh N. Dang, Xuan-Tu Tran, 2019, 2019 IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC).

An Efficient Implementation of LED Block Cipher on FPGA

Fawnizu Azmadi Hussin, Xuan-Tu Tran, Mohd Saufy Rohmad, 2019, 2019 First International Conference of Intelligent Computing and Engineering (ICOICE).

An efficient architecture design for VGA monitor controller

Xuan-Tu Tran, Van-Huan Tran, 2011, 2011 International Conference on Consumer Electronics, Communications and Networks (CECNet).

An Efficient Event-driven Neuromorphic Architecture for Deep Spiking Neural Networks

Xuan-Tu Tran, Francesca Iacopi, Duy Anh Nguyen, 2019, 2019 32nd IEEE International System-on-Chip Conference (SOCC).

High Gain High Efficiency Doherty Amplifiers with Optimized Driver Stages

Xuan-Tu Tran, Duy P. Nguyen, Anh-Vu Pham, 2019, 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS).

Simulation and performance evaluation of a Network-on-Chip architecture based on SystemC

Xuan-Tu Tran, Thanh-Vu Le-Van, Dien-Tap Ngo, 2012, The 2012 International Conference on Advanced Technologies for Communications.

FPGA Implementation of a Low Latency and High Throughput Network-on-Chip Router Architecture

Xuan-Tu Tran, Thanh-Vu Le-Van, Nam-Khanh Dang, 2011 .

Parity-Based ECC and Mechanism for Detecting and Correcting Soft Errors in On-Chip Communication

Khanh N. Dang, Xuan-Tu Tran, Xuan-Tu Tran, 2018, 2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC).

A novel reconfigurable router for QoS guarantees in real-time NoC-based MPSoCs

Xuan-Tu Tran, Hung K. Nguyen, 2019, J. Syst. Archit..

A Design-for-Test Implementation of an Asynchronous Network-on-Chip Architecture and its Associated Test Pattern Generation and Application

Vincent Beroulle, Chantal Robach, Yvain Thonnart, 2008, Second ACM/IEEE International Symposium on Networks-on-Chip (nocs 2008).

Design-for-test approach of an asynchronous network-on-chip architecture and its associated test pattern generation and application

Vincent Beroulle, Chantal Robach, Yvain Thonnart, 2009, IET Comput. Digit. Tech..

A thermal distribution, lifetime reliability prediction and spare TSV insertion platform for stacking 3D-ICs

Akram Ben Ahmed, Khanh N. Dang, Xuan-Tu Tran, 2020, International Conference on Autonomic and Trusted Computing.

FIFO-level-based power management and its application to an H.264 encoder

Edith Beigné, Suzanne Lesecq, Xuan-Tu Tran, 2014, IECON 2014 - 40th Annual Conference of the IEEE Industrial Electronics Society.

Hardware implementation for entropy coding and byte stream packing engine in H.264/AVC

Edith Beigne, Suzanne Lesecq, Pascal Vivet, 2013, 2013 International Conference on Advanced Technologies for Communications (ATC 2013).

Implementation of a Design-for-Test Architecture for Asynchronous Networks-on-Chip

Vincent Beroulle, Chantal Robach, Yvain Thonnart, 2007, First International Symposium on Networks-on-Chip (NOCS'07).

AES Datapath Optimization Strategies for Low-Power Low-Energy Multisecurity-Level Internet-of-Things Applications

Edith Beigné, Diego Puschini, Duy-Hieu Bui, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An asynchronous low-power innovative network-On-chip including design-for-test capabilities

Fabien Clermidy, Yvain Thonnart, Edith Beigne, 2009, 2009 International Conference on Advanced Technologies for Communications.

A fuzzy-logic based voltage-frequency controller for network-on-chip routers

Xuan-Tu Tran, Hai-Phong Phan, 2015, 2015 11th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME).

A novel priority-driven arbiter for the router in reconfigurable Network-on-Chips

Xuan-Tu Tran, Hung K. Nguyen, 2018, 2018 International Conference on IC Design & Technology (ICICDT).

Efficient Binary Arithmetic Encoder for HEVC with multiple bypass bin processing

Xuan-Tu Tran, Dinh-Lam Tran, Duy-Hieu Bui, 2017, 2017 7th International Conference on Integrated Circuits, Design, and Verification (ICDV).

High-Level Modeling and Simulation of a Novel Reconfigurable Network-on-Chip Router

Xuan-Tu Tran, Thanh-Vu Le-Van, 2015 .

User Interest Analysis with Hidden Topic in News Recommendation System

Mai-Vu Tran, Xuan-Tu Tran, Huy-Long Uong, 2010, 2010 International Conference on Asian Language Processing.

2D-PPC: A single-correction multiple-detection method for Through-Silicon-Via Faults

Ben A. Abderazek, Khanh N. Dang, Xuan-Tu Tran, 2019, 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

Analysis and evaluation of traffic-performance in a backtracked routing network-on-chip

Chulwoo Kim, Xuan-Tu Tran, Phi-Hung Pham, 2008, 2008 Second International Conference on Communications and Electronics.

Reducing temporal redundancy in MJPEG using Zipfian estimation techniques

Duy-Hieu Bui, Xuan-Tu Tran, Ngoc-Sinh Nguyen, 2014, 2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

Fuzzy-logic based low power solution for Network-on-Chip architectures

Xuan-Tu Tran, Hai-Phong Phan, 2016, 2016 International Conference on Advanced Technologies for Communications (ATC).

Design and implementation of a hybrid switching router for the reconfigurable Network-on-Chip

Xuan-Tu Tran, Hung K. Nguyen, 2016, 2016 International Conference on Advanced Technologies for Communications (ATC).

An Efficient Hardware Implementation of Artificial Neural Network based on Stochastic Computing

Xuan-Tu Tran, Duy-Anh Nguyen, Duy-Hieu Bui, 2018, 2018 5th NAFOSTED Conference on Information and Computer Science (NICS).

A DFT Architecture for Asynchronous Networks-on-Chip

Vincent Beroulle, Chantal Robach, François Bertrand, 2006, Eleventh IEEE European Test Symposium (ETS'06).

Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB)

Trong-Thuc Hoang, Duc-Hung Le, Cong-Kha Pham, 2020, IEICE Electron. Express.

TSV-OCT: A Scalable Online Multiple-TSV Defects Localization for Real-Time 3-D-IC Systems

Khanh N. Dang, Xuan-Tu Tran, Akram Ben Ahmed, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A Novel Hardware Architecture for Human Detection using HOG-SVM Co-Optimization

Xuan-Tu Tran, Duy-Hieu Bui, Ngo-Doanh Nguyen, 2019, 2019 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS).

A 45nm High-Throughput and Low Latency AES Encryption for Real-Time Applications

Xuan-Tu Tran, Hung K. Nguyen, Pham-Khoi Dong, 2019, 2019 19th International Symposium on Communications and Information Technologies (ISCIT).

Design and Implementation of a SoPC System for Speech Recognition

Xuan-Tu Tran, Hoang Trang, Tran Van Hoang, 2013, MUE.

AXI-NoC: High-Performance Adaptation Unit for ARM Processors in Network-on-Chip Architectures

Tung Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, 2017, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A Survey on Reconfigurable System-on-Chips

Xuan-Tu Tran, Hung K. Nguyen, Thanh-Vu Le-Van, 2018, REV Journal on Electronics and Communications.

Cost-efficient 130nm TSMC Forward Transform and Quantization for H.264/AVC encoders

Xuan-Tu Tran, Van-Huan Tran, Xuan-Tu Tran, 2011, 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems.

A Wideband High Efficiency Ka-Band MMIC Power Amplifier for 5G Wireless Communications

Anh-Vu Pham, Xuan-Tu Tran, Duy P. Nguyen, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

An Efficient Hardware Implementation of Residual Data Binarization in HEVC CABAC Encoder

Cong-Kha Pham, Duy-Hieu Bui, Xuan-Tu Tran, 2020 .

An asynchronous power aware and adaptive NoC based circuit

Fabien Clermidy, Edith Beigné, Alexandre Valentian, 2008, 2008 IEEE Symposium on VLSI Circuits.

Design-for-Test of Asynchronous Networks-on-Chip

Vincent Beroulle, Chantal Robach, François Bertrand, 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.

An Energy Efficient AES Encryption Core for Hardware Security Implementation in IoT Systems

Van-Phuc Hoang, Van-Lan Dao, Xuan-Tu Tran, 2018, 2018 International Conference on Advanced Technologies for Communications (ATC).

Soft-error resilient 3D Network-on-Chip router

Ben A. Abderazek, Khanh N. Dang, Xuan-Tu Tran, 2015, 2015 IEEE 7th International Conference on Awareness Science and Technology (iCAST).

A Thermal-Aware On-Line Fault Tolerance Method for TSV Lifetime Reliability in 3D-NoC Systems

Khanh N. Dang, Xuan-Tu Tran, Akram Ben Ahmed, 2020, IEEE Access.

A Non-Blocking Non-Degrading Multiple Defects Link Testing Method for 3D-Networks-on-Chip

Khanh N. Dang, Xuan-Tu Tran, Michael Conrad Meyer, 2020, IEEE Access.

An efficient hardware architecture for inter-prediction in H.264/AVC encoders

Xuan-Tu Tran, Nam-Khanh Dang, Alain Merirot, 2014, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

An IDPSO algorithm-based application mapping method for Network-on-Chips

Minh-Trien Pham, Xuan-Tu Tran, Hung K. Nguyen, 2017, 2017 7th International Conference on Integrated Circuits, Design, and Verification (ICDV).

A Model of Vietnamese Person Named Entity Question Answering System

Mai-Vu Tran, Xuan-Tu Tran, Duc-Trong Le, 2012, PACLIC.

TSV-IaS: Analytic Analysis and Low-Cost Non-Preemptive on-Line Detection and Correction Method for TSV Defects

Akram Ben Ahmed, Ben A. Abderazek, Khanh N. Dang, 2019, 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

FPGA-Based Lightweight Hardware Architecture of the PHOTON Hash Function for IoT Edge Devices

Xuan-Tu Tran, Gunawan Witjaksono, Azrina Abd Aziz, 2020, IEEE Access.

A novel asynchronous first-in-first-out adapting to multi-synchronous network-on-chips

Xuan-Tu Tran, Thi-Thuy Nguyen, 2014, 2014 International Conference on Advanced Technologies for Communications (ATC 2014).

High-performance adaption of ARM processors into Network-on-Chip architectures

Tung Nguyen, Duy-Hieu Bui, Xuan-Tu Tran, 2013, 2013 IEEE International SOC Conference.

Power consumption estimation using VNOC2.0 simulator for a fuzzy-logic based low power Network-on-Chip

Tomohiro Yoneda, Xuan-Tu Tran, Hai-Phong Phan, 2017, 2017 IEEE International Conference on IC Design and Technology (ICICDT).

A Reconfigurable Multi-function DMA Controller for High-Performance Computing Systems

Xuan-Tu Tran, Hung K. Nguyen, Khoi P. Dong, 2018, 2018 5th NAFOSTED Conference on Information and Computer Science (NICS).

An efficient Context Adaptive Variable Length coding architecture for H.264/AVC video encoders

Suzanne Lesecq, Pascal Vivet, Xuan-Tu Tran, 2012, The 2012 International Conference on Advanced Technologies for Communications.

How to Develop ECC-Based Low Cost RFID Tags Robust Against Side-Channel Attacks

Vincent Beroulle, Yann Kieffer, Xuan-Tu Tran, 2021 .

A trigonometric hardware acceleration in 32-bit RISC-V microcontroller with custom instruction

Trong-Thuc Hoang, Cong-Kha Pham, Xuan-Tu Tran, 2021, IEICE Electronics Express.

HotCluster: A Thermal-Aware Defect Recovery Method for Through-Silicon-Vias Toward Reliable 3-D ICs Systems

Abderazek Ben Abdallah, Akram Ben Ahmed, Khanh N. Dang, 2021, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

A proposal for enhancing training speed in deep learning models based on memory activity survey

Trong-Thuc Hoang, Cong-Kha Pham, Xuan-Tu Tran, 2021, IEICE Electron. Express.

A Review of Algorithms and Hardware Implementations for Spiking Neural Networks

Xuan-Tu Tran, Francesca Iacopi, Duy-Anh Nguyen, 2021, Journal of Low Power Electronics and Applications.

A Model of Vietnamese Person Named Entity

Mai-Vu Tran, Xuan-Tu Tran, Duc-Trong Le, 2012 .