Jipeng Li

A 0.9-V 12-mW 5-MSPS algorithmic ADC with 77-dB SFDR

Gil-Cho Ahn, Jipeng Li, Dong-Young Chang, 2005, VLSIC 2005.

0.9V 12mW 2MSPS algorithmic ADC with 81dB SFDR

Un-Ku Moon, Gil-Cho Ahn, Jipeng Li, 2004, 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525).

A highly-integrated CMOS analog baseband transceiver with 180MSPS 13b pipelined CMOS ADC and dual 12b DACs

Carlos E. Muñoz, Kush Gulati, Anantha Chandrakasan, 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

High-speed pipelined A/D converter using time-shifted CDS technique

Un-Ku Moon, Jipeng Li, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Radix-based digital calibration techniques for multi-stage recycling pipelined ADCs

Dong-Young Chang, Un-Ku Moon, Jipeng Li, 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.

Low voltage high-SNR pipeline data converters

Un-Ku Moon, Jipeng Li, Dong-Young Chang, 2004, The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004..

A Highly Integrated CMOS Analog Baseband Transceiver With 180 MSPS 13-bit Pipelined CMOS ADC and Dual 12-bit DACs

A.P. Chandrakasan, Jipeng Li, M. Lugin, 2006, IEEE Journal of Solid-State Circuits.

An extended radix-based digital calibration technique for multi-stage ADC

Un-Ku Moon, Jipeng Li, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

The Mapping-Adaptive Convolution: A Fundamental Theory for Homography or Perspective Invariant Matching Methods

Zheng Li, Yiguang Liu, Jipeng Li, 2017, SIAM J. Imaging Sci..

Background calibration techniques for multistage pipelined ADCs with digital redundancy

Un-Ku Moon, Jipeng Li, U. Moon, 2003, IEEE Trans. Circuits Syst. II Express Briefs.

Low-Power and High-Speed Pipelined ADC Using Time-Aligned CDS Technique

Un-Ku Moon, Jipeng Li, Bumha Lee, 2007, 2007 IEEE Custom Integrated Circuits Conference.