V. Govind

An External Test Approach for Network-on-a-Chip Switches

R. Ubar, J. Raik, V. Govind, 2006, 2006 15th Asian Test Symposium.

Low-area boundary BIST architecture for mesh-like network-on-chip

J. Raik, V. Govind, 2012, 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

A Generic Synthesizable NoC Switch with a Scalable Testbench

R. Ubar, J. Raik, V. Govind, 2006, 2006 International Biennial Baltic Electronics Conference.