M. Pelella

Performance comparison of differential static CMOS circuit topologies in SOI technology

C. Tretz, Ching-Te Chuang, L. Terman, 1998, 1998 IEEE International SOI Conference Proceedings (Cat No.98CH36199).

Assessing circuit level impact of self-heating in 0.13 /spl mu/m SOI CMOS

C. Tretz, C. Riccobene, S. P. Sinha, 2001, 2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207).

Transient pass-transistor leakage current in SOI MOSFET's

L. Wagner, F. Assaderaghi, B. Davari, 1997, IEEE Electron Device Letters.

SOI lateral diode optimization for ESD protection in 130nm and 90nm technologies

G. Gilfeather, M. Pelella, G. Gilfeather, 2005, 2005 Electrical Overstress/Electrostatic Discharge Symposium.

ESD protection for SOI technology using an under-the-box (substrate) diode structure

N. Subba, M. Pelella, N. Subba, 2004, 2004 Electrical Overstress/Electrostatic Discharge Symposium.