C.R. Moore

A wire-delay scalable microprocessor architecture for high performance systems

N. Ranganathan, R. Nagarajan, D. Burger, 2003, 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC..

Unaccelerated reliability testing for T/R modules: need, methodology and supporting data

C.R. Moore, B.A. Kopp, T.A. Axness, 1997, 1997 IEEE MTT-S International Microwave Symposium Digest.