Michael H. Perrott

发表

A 0.13µm CMOS 78dB SNDR 87mW 20MHz BW CT ΔΣ ADC with VCO-based integrator and quantizer

Min C. Park, Michael H. Perrott, 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation

Michael H. Perrott, Charles G. Sodini, T. L. Tewksbury, 1997, IEEE J. Solid State Circuits.

A modeling approach for ΣΔ fractional-N frequency synthesizers allowing straightforward noise analysis

Mitchell D. Trott, Michael H. Perrott, Charles G. Sodini, 2002, IEEE J. Solid State Circuits.

A Temperature-to-Digital Converter for a MEMS-Based Programmable Oscillator With $< \pm \hbox{0.5-ppm}$ Frequency Stability and $< \hbox{1-ps}$ Integrated Jitter

Fred S. Lee, Jin-Tae Kim, Fari Assaderaghi, 2013, IEEE Journal of Solid-State Circuits.

Techniques for high data rate modulation and low power operation of fractional-N frequency synthesizers

Michael H. Perrott, 1997 .

Fast and accurate behavioral simulation of fractional-N frequency synthesizers and other PLL/DLL circuits

Michael H. Perrott, 2002, DAC '02.

A multiphase PWM RF modulator using a VCO-based opamp in 45nm CMOS

Michael H. Perrott, Min Park, 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

A single-slope 80MS/s ADC using Two-Step Time-to-Digital Conversion

Min C. Park, Michael H. Perrott, 2009, 2009 IEEE International Symposium on Circuits and Systems.

Design and Simulation of Fractional-N Frequency Synthesizers

Michael H. Perrott, 2003 .

An Amplitude Resolution Improvement of an RF-DAC Employing Pulsewidth Modulation

Robert B. Staszewski, Min C. Park, Michael H. Perrott, 2011, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 12-Bit, 10-MHz Bandwidth, Continuous-Time ΣΔ ADC With a 5-Bit, 950-MS/s VCO-Based Quantizer

Michael H. Perrott, M. Z. Straayer, M. Perrott, 2008, VLSIC 2008.

A 0.5 V $< \hbox{4}\ \mu$W CMOS Light-to-Digital Converter Based on a Nonuniform Quantizer for a Photoplethysmographic Heart-Rate Sensor

Mohammad Alhawari, Michael H. Perrott, Nadya Albelooshi, 2014, IEEE Journal of Solid-State Circuits.

A temperature-to-digital converter for a MEMS-based programmable oscillator with better than ±0.5ppm frequency stability

Fred S. Lee, Jin-Tae Kim, Fari Assaderaghi, 2012, 2012 IEEE International Solid-State Circuits Conference.

A low-area switched-resistor loop-filter technique for fractional-N synthesizers applied to a MEMS-based programmable oscillator

Fred S. Lee, Michael H. Perrott, Sudhakar Pamarti, 2010, 2010 IEEE International Solid-State Circuits Conference - (ISSCC).

Behavioral Simulation of Fractional-N Frequency Synthesizers and Other PLL Circuits

Michael H. Perrott, 2002, IEEE Des. Test Comput..

A Low Area, Switched-Resistor Based Fractional-N Synthesizer Applied to a MEMS-Based Programmable Oscillator

Fred S. Lee, Michael H. Perrott, Sudhakar Pamarti, 2010, IEEE Journal of Solid-State Circuits.

A Time-Domain Resolution Improvement of an RF-DAC

Robert B. Staszewski, Min C. Park, Michael H. Perrott, 2010, IEEE Transactions on Circuits and Systems II: Express Briefs.

A > 89% efficient LED driver with 0.5V supply voltage for applications requiring low average current

Wala Saadeh, Michael H. Perrott, Temesghen Tekeste, 2013, 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC).

A 0.5V <4µW CMOS photoplethysmographic heart-rate sensor IC based on a non-uniform quantizer

Mohammad Alhawari, Michael H. Perrott, Nadya Albelooshi, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

A fractional- N frequency synthesizer architecture utilizing a mismatch compensated PFD/DAC structure for reduced quantization-induced phase noise

Scott E. Meninger, Michael H. Perrott, 2003 .

A programmable MEMS-based clock generator with sub-ps jitter performance

Fred S. Lee, Fari Assaderaghi, Michael H. Perrott, 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

Session 15 overview: Data converter techniques

Geert Van der Plas, Michael H. Perrott, M. Perrott, 2013, ISSCC.

A Low-Noise, Wide-BW 3.6GHz Digital ΔΣ Fractional-N Frequency Synthesizer with a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation

Matthew Z. Straayer, Michael H. Perrott, Chun-Ming Hsu, 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

Fractional-N frequency synthesizer design at the transfer function level using a direct closed loop realization algorithm

Michael H. Perrott, Charlotte Y. Lau, 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

A Low-Noise Wide-BW 3.6-GHz Digital $\Delta\Sigma$ Fractional-N Frequency Synthesizer With a Noise-Shaping Time-to-Digital Converter and Quantization Noise Cancellation

Matthew Z. Straayer, Michael H. Perrott, Chun-Ming Hsu, 2008, IEEE Journal of Solid-State Circuits.

A clockless, multi-stable, CMOS analog circuit

Mohammad Alhawari, Michael H. Perrott, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

A VCO-based analog-to-digital converter with second-order Sigma-Delta noise shaping

Min C. Park, Michael H. Perrott, 2009, 2009 IEEE International Symposium on Circuits and Systems.

A numerical design approach for high speed, differential, resistor-loaded, CMOS amplifiers

Michael H. Perrott, Ethan Crain, 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

∝s Settling and 2Mb/s Closed Loop Modulation

Andrew Z Grzegorek, Scott D. Willingham, Michael H. Perrott, 2000 .

Large-scale timing distribution and RF-synchronization for FEL facilities

William Graves, Michael H. Perrott, David E. Moncton, 2004 .

Design Using the PLL Design Assistant Program

Michael H. Perrott, 2005 .

A 78 dB SNDR 87 mW 20 MHz Bandwidth Continuous-Time � ADC With VCO-Based Integrator and Quantizer Implemented in 0 . 13 � m CMOS

Michael H. Perrott, M. Perrott, M. Park, 2009 .

High Speed Communication Circuits and Systems

Michael H. Perrott, 2003 .