Kazutoshi Wakabayashi

发表

Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing

Masanori Hashimoto, Hiroaki Konoura, Dawood Alnajiar, 2014, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Shusuke Yoshimoto, Hiroshi Kawaguchi, Yukio Mitsuyama, 2018, VLSI Design and Test for Systems Dependability.

Study and Analysis of System LSI Design Methodologies Using C-Based Behavioral Synthesis

Satoshi Takahashi, Kazutoshi Wakabayashi, Takashi Takenaka, 2003, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Mixed-grained reconfigurable architecture supporting flexible reliability and C-based design

Masanori Hashimoto, Hiroaki Konoura, Dawood Alnajiar, 2013, 2013 International Conference on Reconfigurable Computing and FPGAs (ReConFig).

System LSI design with C-based behavioral synthesis and verification

Kazutoshi Wakabayashi, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Synthesizing "Verification Aware" Models: Why and How?

Kazutoshi Wakabayashi, Aarti Gupta, Malay K. Ganai, 2007, 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07).

Knowledge-Based Placement Technique for Printed Wiring Boards

Kazutoshi Wakabayashi, Gotaro Odawara, Kazuhiko Iijima, 1985, DAC 1985.

Mixed-Grained Reconfigurable Array Compatible with High-Level Synthesis

Hiroaki Konoura, Hajime Shimada, Hiroyuki Ochi, 2015 .

Design of complex image processing systems in ESL

Kazutoshi Wakabayashi, Benjamin Carrión Schäfer, Ashish Trambadia, 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).

Global scheduling independent of control dependencies based on condition vectors

Kazutoshi Wakabayashi, Hirohito Tanaka, K. Wakabayashi, 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

Device for judging sharability of computing element/ storage device/data transfer device

Kazutoshi Wakabayashi, 若林一敏, 1992 .

Are we ready for system-level synthesis?

Jason Cong, Jan M. Rabaey, Kazutoshi Wakabayashi, 2005, ASP-DAC '05.

Unified Representation for Speculative Scheduling: Generalized Condition Vector

Kazutoshi Wakabayashi, 2006, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A highly-dense mixed grained reconfigurable architecture with overlay crossbar interconnect using via-switch

Masanori Hashimoto, Yukio Mitsuyama, Hiroyuki Ochi, 2016, 2016 26th International Conference on Field Programmable Logic and Applications (FPL).

Wire congestion aware synthesis for a dynamically reconfigurable processor

Takumi Okamoto, Hideharu Amano, Kazutoshi Wakabayashi, 2010, 2010 International Conference on Field-Programmable Technology.

High-level synthesis challenges and solutions for a dynamically reconfigurable processor

Kazutoshi Wakabayashi, Li Jing, Toru Awashima, 2006, ICCAD.

Logic Minimization for Large-Scale Networks Based on Multi-Signal Implications (Special Section on VLSI Design and CAD Algorithms)

Kazutoshi Wakabayashi, Takeshi Yoshimura, Masayuki Yuguchi, 1999 .

C-based behavioral synthesis and verification analysis on industrial design examples

Kazutoshi Wakabayashi, 2004 .

Controller re-specification to minimize switching activity in controller/data path circuits

Sujit Dey, Niraj K. Jha, Anand Raghunathan, 1996, ISLPED.

Foreword

Kazutoshi Wakabayashi, K. Wakabayashi, 2003, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

A resource sharing and control synthesis method for conditional branches

Kazutoshi Wakabayashi, Takeshi Yoshimura, T. Yoshimura, 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

Reliability-configurable mixed-grained reconfigurable array supporting C-to-array mapping and its radiation testing

Masanori Hashimoto, Hiroaki Konoura, Yukio Mitsuyama, 2013, 2013 IEEE Asian Solid-State Circuits Conference (A-SSCC).

AI, IoT acceralation with “via-switch” FPGA and high level synthesis

Kazutoshi Wakabayashi, 2017 .

Programmable SpaceWire interface with atom switch: Components, short paper

Kazutoshi Wakabayashi, Akira Iwasaki, Toshitsugu Sakamoto, 2016, 2016 International SpaceWire Conference (SpaceWire).

CODES+ISSS 2009 guest editors’ introduction

Wolfgang Rosenstiel, Kazutoshi Wakabayashi, W. Rosenstiel, 2010, Des. Autom. Embed. Syst..

Machine learning predictive modelling high-level synthesis design space exploration

Kazutoshi Wakabayashi, Benjamin Carrión Schäfer, K. Wakabayashi, 2012, IET Comput. Digit. Tech..

Real-time multimedia with C compiler for Hardware

Kazutoshi Wakabayashi, 2010, 2010 8th IEEE Workshop on Embedded Systems for Real-Time Multimedia.

Controller-based power management for control-flow intensive designs

Sujit Dey, Niraj K. Jha, Anand Raghunathan, 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Power management techniques for control-flow intensive designs

Sujit Dey, Niraj K. Jha, Anand Raghunathan, 1997, DAC.

Proceedings of the 2009 Asia and South Pacific Design Automation Conference

Kazutoshi Wakabayashi, 2009, ASP-DAC 2009.

Technical program committee

Frank Vahid, Mani Srivastava, Kazutoshi Wakabayashi, 1996, Asia-Pacific Microwave Conference 2011.

A Partitioning Method for Area Optimization by Tree Analysis

Kazutoshi Wakabayashi, Yuichi Nakamura, Tomoyuki Fujita, 1993 .

Reliability-configurable mixed-grained reconfigurable array compatible with high-level synthesis

Masanori Hashimoto, Hiroaki Konoura, Dawood Alnajiar, 2015, The 20th Asia and South Pacific Design Automation Conference.

Knowledge-Based Placement Technique for Printed Wiring Boards

Kazutoshi Wakabayashi, Gotaro Odawara, Kazuhiko Iijima, 1985, 22nd ACM/IEEE Design Automation Conference.

High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor

Kazutoshi Wakabayashi, Toru Awashima, Takao Toi, 2010, IPSJ Trans. Syst. LSI Des. Methodol..

Design-for-Debugging of application specific designs

Miodrag Potkonjak, Kazutoshi Wakabayashi, Sujit Dey, 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

Mapping complex algorithm into FPGA with High Level Synthesis reconfigurable chips with High Level Synthesis compared with CPU, GPGPU

Kazutoshi Wakabayashi, Takashi Takenaka, Hiroaki Inoue, 2014, 2014 19th Asia and South Pacific Design Automation Conference (ASP-DAC).

Multi-Level Logic Minimization based on Multi-Signal Implications

Kazutoshi Wakabayashi, Yuichi Nakamura, Tomoyuki Fujita, 1995, 32nd Design Automation Conference.

C-based synthesis experiences with a behavior synthesizer, "Cyber"

Kazutoshi Wakabayashi, K. Wakabayashi, 1999, Design, Automation and Test in Europe Conference and Exhibition, 1999. Proceedings (Cat. No. PR00078).

Reconfigurable chip advantage compared with GPGPU from the compiler perspective

Kazutoshi Wakabayashi, 2013, FPT.

Property-specific witness graph generation for guided simulation

Kazutoshi Wakabayashi, S. Liu, Aarti Gupta, 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

Session details: Session 7B: Architecture oriented scheduling

Miodrag Potkonjak, Kazutoshi Wakabayashi, M. Potkonjak, 2001, International Conference on Computer Aided Design.

Design Space Exploration Acceleration Through Operation Clustering

Kazutoshi Wakabayashi, Benjamin Carrión Schäfer, 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

NEC and ICCAD — EDA Partners in Success

Kazutoshi Wakabayashi, Aarti Gupta, Anand Raghunathan, 2003 .

Novel processor architecture for onboard infrared sensors

Yukio Mitsuyama, Hiroyuki Ochi, Kazutoshi Wakabayashi, 2016, Optical Engineering + Applications.

Via-Switch FPGA: Highly Dense Mixed-Grained Reconfigurable Architecture With Overlay Via-Switch Crossbars

Masanori Hashimoto, Yukio Mitsuyama, Kazutoshi Wakabayashi, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Spatial-temporal mapping of real applications on a Dynamically Reconfigurable Logic Engine (DRLE) LSI

Kazutoshi Wakabayashi, Masato Motomura, K. Furuta, 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

Controller re-specification to minimize switching activity in controller/data path circuits

Niraj K. Jha, Anand Raghunathan, Kazutoshi Wakabayashi, 1996, Proceedings of 1996 International Symposium on Low Power Electronics and Design.

Sensor Signal Processing Using High-Level Synthesis With a Layered Architecture

Masanori Hashimoto, Yukio Mitsuyama, Hiroyuki Kanbara, 2018, IEEE Embedded Systems Letters.

Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor

Takumi Okamoto, Hideharu Amano, Kazutoshi Wakabayashi, 2011, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Property-specific testbench generation for guided simulation

Kazutoshi Wakabayashi, Aarti Gupta, Albert E. Casavant, 2002, Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design.

C-based behavioral synthesis and verification analysis on industrial design examples

Kazutoshi Wakabayashi, 2004, ASP-DAC.

C - based high - level synthesis system, CYBER - Design experience

Kazutoshi Wakabayashi, K. Wakabayashi, 2000 .

Divide and conquer high-level synthesis design space exploration

Kazutoshi Wakabayashi, Benjamin Carrión Schäfer, K. Wakabayashi, 2012, TODE.

Range Limiter Using Connection Bounding Box for SA-Based Placement of Mixed-Grained Reconfigurable Architecture

Hiroyuki Ochi, Kazutoshi Wakabayashi, Wataru Takahashi, 2016, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

“All-in-C” Behavioral Synthesis and Verification with CyberWorkBench

Kazutoshi Wakabayashi, Benjamin Carrion Schafer, 2008 .

Applications of Reconfigurable Processors as Embedded Automatons in the IoT Sensor Networks in Space

Yukio Mitsuyama, Hiroyuki Ochi, Kazutoshi Wakabayashi, 2019 .

Acceleration of the Discrete Element Method: From RTL to C-Based Design

Kazutoshi Wakabayashi, Benjamin Carrion Schafer, B. C. Schafer, 2013 .

C-based Hardware Design Methodology : With a Behavior Synthesizer, "Cyber" ( )

Kazutoshi Wakabayashi, 1999 .

Implementing and evaluating stream applications on the dynamically reconfigurable processor

Hideharu Amano, Kazutoshi Wakabayashi, Yutaka Yamada, 2004, 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines.

Fixed Point Data Type Modeling for High Level Synthesis

Kazutoshi Wakabayashi, Benjamin Carrión Schäfer, Wataru Takahashi, 2010, IEICE Trans. Electron..

Proceedings of the 7th International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2009, Grenoble, France, October 11-16, 2009

Wolfgang Rosenstiel, Kazutoshi Wakabayashi, 2009, CODES+ISSS.

33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al Applications

Masanori Hashimoto, Yukio Mitsuyama, Hiroyuki Ochi, 2020, 2020 IEEE International Solid- State Circuits Conference - (ISSCC).

Stream applications on the dynamically reconfigurable processor

Hideharu Amano, Kazutoshi Wakabayashi, Yutaka Yamada, 2004, Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921).

Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems

Houman Homayoun, Kazutoshi Wakabayashi, Alexander V. Veidenbaum, 2010, 2010 ACM/IEEE International Symposium on Low-Power Electronics and Design (ISLPED).

Max-Flow Scheduling in High-Level Synthesis

Kazutoshi Wakabayashi, Takashi Takenaka, Takeshi Yoshimura, 2005, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Design-for-debugging of application specific designs

Miodrag Potkonjak, Sujit Dey, Kazutoshi Wakabayashi, 1995, ICCAD.

Cyber: High Level Synthesis System from Software into ASIC

Kazutoshi Wakabayashi, K. Wakabayashi, 1991 .

120-Channel Transmultiplexer Design and Performance

Kazutoshi Wakabayashi, R. Maruta, A. Tomozawa, 1980, IEEE Trans. Commun..

Precision tunable RTL macro-modelling cycle-accurate power estimation

Kazutoshi Wakabayashi, Benjamin Carrión Schäfer, K. Wakabayashi, 2011, IET Comput. Digit. Tech..

Formal Verification and Debugging of VLSI Logic Design for Systems Dependability: Experiments and Evaluation

Kazutoshi Wakabayashi, Takashi Takenaka, Hiroaki Yoshida, 2019 .

Efficient throughput optimization of feedback linear computations using generalized Horner's scheme

Miodrag Potkonjak, Jan M. Rabaey, Kazutoshi Wakabayashi, 1995, 1995 International Conference on Acoustics, Speech, and Signal Processing.

A programming environment for multi-FPGA systems based on CyberWorkBench: an integrated design tool

Hideharu Amano, Kazutoshi Wakabayashi, Hiroaki Suzuki, 2021, HEART.