David C. Keezer

发表

Burst-Mode Transmission and Data Recovery for Multi-GHz Optical Packet Switching Network Testing

Keren Bergman, Howard Wang, Carl Edward Gray, 2011, 2011 Asian Test Symposium.

Electrical troubleshooting, diagnostics, and repair of multichip modules

David C. Keezer, 1995, Proceedings of 1995 IEEE International Test Conference (ITC).

HIGH FREQUENCY WAFER PROBING AND POWER SUPPLY RESONANCE EFFECTS

David C. Keezer, S. P. Athan, J. McKinley, 1991, 1991, Proceedings. International Test Conference.

Enhanced Resolution Time-Domain Reflectometry for High Speed Channels: Characterizing Spatial Discontinuities with Non-ideal Stimulus

Abhijit Chatterjee, Suvadeep Banerjee, David C. Keezer, 2013, 2013 22nd Asian Test Symposium.

Universal test interface for HP82000 and HP83000

David C. Keezer, 1999 .

Stretching the limits of FPGA SerDes for enhanced ATE performance

David C. Keezer, A. M. Majid, 2010, 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010).

An architecture for WSI rapid prototyping

Vijay K. Jain, David C. Keezer, Hiroomi Hikawa, 1992, Computer.

Multiplexing test system channels for data rates above 1 Gb/s

David C. Keezer, 1990, Proceedings. International Test Conference 1990.

Modular extension of ATE to 5 Gbps

David C. Keezer, Dany Minier, F. Binette, 2004, 2004 International Conferce on Test.

A Novel Approach to Detect Hardware Trojan Attacks on Primary Data Inputs

David C. Keezer, Vincent John Mooney, Taimour Wehbe, 2015, WESS.

A chip-level security framework for assessing sensor data integrity: work-in-progress

David C. Keezer, Vincent John Mooney, Taimour Wehbe, 2018, CODES+ISSS.

A development platform and electronic modules for automated test up to 20 Gbps

Carl Edward Gray, David C. Keezer, A. M. Majid, 2009, 2009 International Test Conference.

Practical methods for extending ATE to 40 and 50Gbps

Carl Edward Gray, David C. Keezer, A. M. Majid, 2013, 2013 IEEE International Test Conference (ITC).

Multi-purpose digital test core utilizing programmable logic

David C. Keezer, J. S. Davis, 2002, Proceedings. International Test Conference.

Low-cost multi-gigahertz test systems using CMOS FPGAs and PECL

Carl Edward Gray, David C. Keezer, Ashraf M. Majid, 2005, Design, Automation and Test in Europe.

Test support processors for enhanced testability of high performance circuits

Q. Zhou, David C. Keezer, D. Keezer, 1999, International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034).

Alternative interface methods for testing high speed bidirectional signals

Q. Zhou, David C. Keezer, D. Keezer, 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

Calibration techniques for a gigahertz test system

David C. Keezer, R. J. Wenzel, 1992, Proceedings International Test Conference 1992.

Multi-Gigahertz Testing of Wafer-Level Packaged Devices

Mihai Rotaru, David C. Keezer, Jayasanker Jayabalan, 2006, 2006 IEEE International Test Conference.

Low-Cost 20 Gbps Digital Test Signal Synthesis Using SiGe and InP Logic

Carl Edward Gray, David C. Keezer, Dany Minier, 2010, J. Electron. Test..

Tester Independent Support Software System (TISSS)

Robert M. Rolfe, David C. Keezer, L. J. Falkenstrom, 1985, ITC.

Low cost ATE pin electronics for multigigabit-per-second at-speed test

David C. Keezer, R. J. Wenzel, 1997, Proceedings International Test Conference 1997.

Extending a DWDM Optical Network Test System to 12 Gbps x4 Channels

Carl Edward Gray, David C. Keezer, 2011, J. Electron. Test..

Securing Medical Devices Against Hardware Trojan Attacks Through Analog-, Digital-, and Physiological-Based Signatures

Omer T. Inan, David C. Keezer, Vincent John Mooney, 2018, J. Hardw. Syst. Secur..

Application and demonstration of a digital test core: optoelectronic test bed and wafer-level prober

Keren Bergman, Odile Liboiron-Ladouceur, David C. Keezer, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

A production-oriented multiplexing system for testing above 2.5 gbps

David C. Keezer, Dany Minier, Marie-Christine Caron, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

Multi-channel testing architecture for high-speed eye-diagram using pin electronics and subsampling monobit reconstruction algorithms

Abhijit Chatterjee, David C. Keezer, Thomas Moon, 2014, 2014 IEEE 32nd VLSI Test Symposium (VTS).

Work-in-Progress: A Chip-Level Security Framework for Assessing Sensor Data Integrity

David C. Keezer, Vincent J. Mooney, Taimour Wehbe, 2018, 2018 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

Known good die for MCMs: Enabling technologies

David C. Keezer, 1993, Proceedings of IEEE International Test Conference - (ITC).

Wafer Scale Integration: A university perspective

Vijay K. Jain, David L. Landis, David C. Keezer, 1991, J. VLSI Signal Process..

Multi-gigaHertz testing challenges and solutions

Karim Arabi, David C. Keezer, Sassan Tabatabaei, 2002, Proceedings 20th IEEE VLSI Test Symposium (VTS 2002).

Multi-function multi-GHz ATE extension using state-of-the-art FPGAs

David C. Keezer, A. M. Majid, 2011, 2011 IEEE International Test Conference.

Variable Delay of Multi-Gigahertz Digital Signals for Deskew and Jitter-Injection Test Applications

David C. Keezer, Dany Minier, Patrice Ducharme, 2008, 2008 Design, Automation and Test in Europe.

A Framework for Design of Self-Repairing Digital Systems

David C. Keezer, Jingchi Yang, 2019, 2019 IEEE International Test Conference (ITC).

An architecture for graphics processing in an FPGA (abstract only)

David C. Keezer, Marcus Dutton, 2010, FPGA '10.

Multi-GHz loopback testing using MEMs switches and SiGe logic

David C. Keezer, Dany Minier, Patrice Ducharme, 2007, 2007 IEEE International Test Conference.

A high throughput test methodology for MCM substrates

Abhijit Chatterjee, Bruce C. Kim, David C. Keezer, 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

Biologically inspired hierarchical structure for self-repairing FPGAs

David C. Keezer, Jingchi Yang, D. Keezer, 2017, 2017 International Conference on ReConFigurable Computing and FPGAs (ReConFig).

Guest Editorial: Special Issue on Analog, Mixed-Signal, RF, and MEMS Testing

David C. Keezer, Hsiu-Ming Chang, 2012, J. Electron. Test..

Multi-gigahertz arbitrary timing generator and data pattern serializer/formatter

Sungyeol Kim, Carl Edward Gray, David C. Keezer, 2012, 2012 IEEE International Test Conference.

Efficient Built-In Test and Calibration of High Speed Serial I/O Systems Using Monobit Signal Acquisition

Abhijit Chatterjee, David C. Keezer, Hyun Woo Choi, 2019, J. Electron. Test..

Hardware-Based Run-Time Code Integrity in Embedded Devices

David C. Keezer, Vincent John Mooney, Taimour Wehbe, 2018, Cryptogr..

Improved sensitivity for parallel test of substrate interconnections

David C. Keezer, J. S. Davis, K. E. Newman, 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

Co-development of test electronics and PCI Express interface for a multi-Gbps optical switching network

Keren Bergman, Carl Edward Gray, David C. Keezer, 2007, 2007 IEEE International Test Conference.

An Electronic Module for 12.8 Gbps Multiplexing and Loopback Test

David C. Keezer, A. M. Majid, Dany Minier, 2008, 2008 IEEE International Test Conference.

Minimizing simultaneous switching noise at reduced power with constant-voltage power transmission lines for high-speed signaling

Madhavan Swaminathan, David C. Keezer, Satyanarayana Telikepalli, 2013, International Symposium on Quality Electronic Design (ISQED).

Two methods for 24 Gbps test signal synthesis

Carl Edward Gray, David C. Keezer, 2011, 2011 Design, Automation & Test in Europe.

Multiplexing ATE channels for production testing at 2.5 Gbps

David C. Keezer, Dany Minier, Marie-Christine Caron, 2004, IEEE Design & Test of Computers.

MEMS Switches and SiGe Logic for Multi-GHz Loopback Testing

David C. Keezer, Dany Minier, Patrice Ducharme, 2008, VLSI Design.

A low-cost massively-parallel interconnect test method for MCM substrates

David C. Keezer, K. E. Newman, 1997, Proceedings International Test Conference 1997.

Terabit-per-second automated digital testing

Q. Zhou, David C. Keezer, C. Bair, 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).

MCM TEST USING AVAILABLE TECHNOLOGY

David C. Keezer, 1992, Proceedings International Test Conference 1992.

A 40Gbps economic extension board and FPGA-based testing platform

David C. Keezer, Te-Hui Chen, 2016, 2016 21th IEEE European Test Symposium (ETS).

SMAC: A scene matching chip

Raghu Sastry, N. Ranganathan, Joseph W. Yoder, 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.

Source-synchronous testing of multilane PCI Express and HyperTransport buses

David C. Keezer, Dany Minier, Patrice Ducharme, 2006, IEEE Design & Test of Computers.

REAL-TIME DATA COMPARISON FOR GIGAHERTZ DIGITAL TEST

David C. Keezer, 1991, 1991, Proceedings. International Test Conference.

A 5 Gbps Wafer-Level Tester

David C. Keezer, A. M. Majid, J. V. Karia, 2005, 14th Asian Test Symposium (ATS'05).

Challenges and solutions for multi-Gigahertz testing

David C. Keezer, 2002, Proceedings. International Test Conference.

Method for Reducing Jitter in Multi-Gigahertz ATE

David C. Keezer, Dany Minier, Patrice Ducharme, 2007, 2007 Design, Automation & Test in Europe Conference & Exhibition.

An FPGA-based ATE extension module for low-cost multi-GHz memory test

Abhijit Chatterjee, Sungyeol Kim, David C. Keezer, 2015, 2015 20th IEEE European Test Symposium (ETS).

An Ultra-High-Speed Test Module and FPGA-Based Development Platform

David C. Keezer, Te-Hui Chen, 2016, 2016 IEEE 25th Asian Test Symposium (ATS).

A signature based architecture for Trojan detection

Axel Poschmann, Marc Stöttinger, David C. Keezer, 2014, WESS '14.