Brendan Mullane

发表

Performance optimization methods for switched-capacitor biquadratic filters

Ondrej Subrt, Jiri Nahlik, Jiri Hospodka, 2018 .

IEEE 1500 wrapper control using an IEEE 1149.1 test access port.

Michael Higgins, Brendan Mullane, Ciaran MacNamee, 2008 .

High Order Mismatch Shaping for Low Oversampling Rates

Brendan Mullane, Vincent O'Brien, Brendan Mullane, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Investigation of a Superscalar Operand Stack Using FO4 and ASIC Wire-Delay Metrics

Chris Bailey, Brendan Mullane, 2014, VLSI Design.

Experimental validation of DAC with nested bus-splitting EFM4 DDSM

Michael Peter Kennedy, Hongjia Mo, Brendan Mullane, 2013, 2013 European Conference on Circuit Theory and Design (ECCTD).

High order mismatch noise shaping for bandpass DACs

Brendan Mullane, Vincent O'Brien, 2011, 2011 18th IEEE International Conference on Electronics, Circuits, and Systems.

Correction to: A Reduced Hardware ISI and Mismatch Shaping DEM Decoder

Brendan Mullane, Vincent O'Brien, Anthony G. Scanlan, 2018, Circuits Syst. Signal Process..

A prototype platform for system-on-chip ADC test and measurement

Brendan Mullane, Ciaran MacNamee, Vincent O'Brien, 2009, 2009 IEEE International SOC Conference (SOCC).

Design and implementation challenges for adoption of the IEEE 1500 standard

Michael Higgins, Brendan Mullane, Ciaran MacNamee, 2010, IET Comput. Digit. Tech..

High order Dynamic Element Matching for multi-bit Delta Sigma A/D & D/A converters

Brendan Mullane, Ciaran MacNamee, Vincent O. Brien, 2014 .

IEEE 1500 Core Wrapper Optimization Techniques and Implementation

Michael Higgins, Brendan Mullane, Ciaran MacNamee, 2008, 2008 IEEE International Test Conference.

A Wideband 6th Order Programmable Bandpass DEM Implementation for a Nyquist DAC

Brendan Mullane, Christophe Erdmann, Roberto Pelliconi, 2020, 2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Analysis and Design of a Tri-Level Current-Steering DAC With 12-Bit Linearity and Improved Impedance Matching Suitable for CT-ADCs

Brendan Mullane, Eric Thompson, Shantanu Mehta, 2020, IEEE Open Journal of Circuits and Systems.

Analysis of feedback predictive encoder based ADCs

Brendan Mullane, Vincent O'Brien, Eric Thompson, 2017 .

A high performance band-pass DAC architecture and design targeting a low voltage silicon process

Brendan Mullane, Vincent O'Brien, 2011, 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip.

IEEE1500CoreWrapperOptimization Techniques andImplementation

Michael Higgins, Brendan Mullane, 2008 .

A 100dB SFDR 0.5V pk-pk Band-Pass DAC Implemented on a Low Voltage CMOS Process

Brendan Mullane, Vincent O'Brien, 2011, VLSI-SoC.

SoCECT:System onChipEmbedded CoreTest

Michael Higgins, Brendan Mullane, Ciaran MacNamee, 2008 .

A Tri-level Current-Steering DAC Design with Improved Output-Impedance Related Dynamic Performance

Brendan Mullane, Daniel O'Hare, Anthony G. Scanlan, 2019, 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS).

An on-chip solution for static ADC test and measurement

Brendan Mullane, Ciaran MacNamee, Vincent O'Brien, 2009, GLSVLSI '09.

An optimal IEEE 1500 core wrapper design for improved test access and reduced test time

Michael Higgins, Brendan Mullane, Ciaran MacNamee, 2008 .

A dynamic ADC test processor for built-in-self-test of ADCs

Brendan Mullane, Thomas Fleischmann, 2008 .

A Novel System on Chip (SoC) Test Solution

Michael Higgins, Brendan Mullane, Ciaran MacNamee, 2008, 2008 IEEE Computer Society Annual Symposium on VLSI.

A Reduced Hardware ISI and Mismatch Shaping DEM Decoder

Brendan Mullane, Vincent O'Brien, Anthony G. Scanlan, 2018, Circuits Syst. Signal Process..

SoCECT: System on Chip Embedded Core Test

Michael Higgins, Brendan Mullane, Ciaran MacNamee, 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.

An SOC platform for ADC test and measurement

Brendan Mullane, Ciaran MacNamee, Vincent O'Brien, 2009, 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems.

Bandwidth Enhancement to Continuous-Time Input Pipeline ADCs

Brendan Mullane, Eric Thompson, Anthony G. Scanlan, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Test Access Port.

Brendan Mullane, Ciaran MacNamee, Michael Higgins, 2010 .

Optimized switched capacitor biquads for two-channel quadrature-mirror filter bank

Pavel Sovka, Jiri Nahlik, Brendan Mullane, 2014 .

A2DTest: A complete integrated solution for on-chip ADC self-test and analysis

Brendan Mullane, Ciaran MacNamee, Vincent O'Brien, 2009, 2009 International Test Conference.

FPGA Prototyping of a Scan Based System-On-Chip Design

Michael Higgins, Tapan J. Chakraborty, Brendan Mullane, 2007, ReCoSoC.

An In-Place Processor Design for Real-Value FFTs Targeting in-situ Dynamic ADC Test

Brendan Mullane, Vincent O'Brien, 2018, 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS).

A Higher-Order Programmable Amplitude and Timing Error Shaping Bandpass DEM for Nyquist-Rate D/A Converters

Brendan Mullane, Vincent O'Brien, Christophe Erdmann, 2021, 2021 IEEE International Symposium on Circuits and Systems (ISCAS).

Comparison of High-Order Programmable Mismatch Shaping Bandpass DEM Implementations Applicable to Nyquist-Rate D/A Converters

Brendan Mullane, Christophe Erdmann, Roberto Pelliconi, 2021, IEEE Open Journal of Circuits and Systems.

A Hardware Implementation of a qEEG-Based Discriminant Function for Brain Injury Detection

Brendan Mullane, Ciaran MacNamee, Fotios Kostarelos, 2021, 2021 IEEE Biomedical Circuits and Systems Conference (BioCAS).