Robert D. Mullins

发表

An Energy and Performance Exploration of Network-on-Chip Architectures

Arnab Banerjee, Gerard J. M. Smit, Simon W. Moore, 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A fully asynchronous superscalar architecture

D. K. Arvind, Robert D. Mullins, R. Mullins, 1999, 1999 International Conference on Parallel Architectures and Compilation Techniques (Cat. No.PR00425).

A Power and Energy Exploration of Network-on-Chip Architectures

Arnab Banerjee, Simon W. Moore, Robert D. Mullins, 2007, First International Symposium on Networks-on-Chip (NOCS'07).

Improving smart card security using self-timed circuits

George S. Taylor, Ross J. Anderson, Simon W. Moore, 2002, Proceedings Eighth International Symposium on Asynchronous Circuits and Systems.

Point to point GALS interconnect

Peter Robinson, George S. Taylor, Simon W. Moore, 2002, Proceedings Eighth International Symposium on Asynchronous Circuits and Systems.

Self calibrating clocks for globally asynchronous locally synchronous systems

Peter Robinson, George S. Taylor, Simon W. Moore, 2000, Proceedings 2000 International Conference on Computer Design.

A Network of Time-Division Multiplexed Wiring for FPGAs

Simon W. Moore, Robert D. Mullins, Rosemary M. Francis, 2008, Second ACM/IEEE International Symposium on Networks-on-Chip (nocs 2008).

Security Evaluation of Asynchronous Circuits

George S. Taylor, Simon W. Moore, Huiyun Li, 2003, CHES.

Balanced self-checking asynchronous logic for smart card applications

George S. Taylor, Ross J. Anderson, Simon W. Moore, 2003, Microprocess. Microsystems.

Low-latency virtual-channel routers for on-chip networks

Simon W. Moore, Robert D. Mullins, Andrew West, 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

The design and implementation of a low-latency on-chip network

Simon W. Moore, Robert D. Mullins, Andrew West, 2006, Asia and South Pacific Conference on Design Automation, 2006..

Micronets: a model for decentralising control in asynchronous processor architectures

D. K. Arvind, Robert D. Mullins, Vinod E. F. Rebello, 1995, Proceedings Second Working Conference on Asynchronous Design Methodologies.

Dynamic instruction scheduling and data forwarding in asynchronous superscalar processors

Robert D. Mullins, R. Mullins, 2001 .

Designing a Physical Locality Aware Coherence Protocol for Chip-Multiprocessors

Simon W. Moore, Robert D. Mullins, Christian Fensch, 2013, IEEE Transactions on Computers.

Demystifying Data-Driven and Pausible Clocking Schemes

Simon W. Moore, Robert D. Mullins, S. Moore, 2007, 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07).

Commodity single board computer clusters and their applications

Steven J. Johnston, Simon J. Cox, Fung Po Tso, 2018, Future Gener. Comput. Syst..

Next generation single board clusters

Steven J. Johnston, Simon J. Cox, Fung Po Tso, 2018, NOMS 2018 - 2018 IEEE/IFIP Network Operations and Management Symposium.

DAdaQuant: Doubly-adaptive quantization for communication-efficient Federated Learning pdf

Robert D. Mullins, Yiren Zhao, Robert Hönig, 2021, ICML.

Lane Compression

Robert D. Mullins, Alex Chadwick, Daniel Bates, 2021, ACM Trans. Embed. Comput. Syst..

Rapid Model Architecture Adaption for Meta-Learning pdf

Xitong Gao, Robert Mullins, Robert D. Mullins, 2021, ArXiv.

Architectural Backdoors in Neural Networks

Robert D. Mullins, Nicolas Papernot, R. Mullins, 2022, ArXiv.

Efficient Adversarial Training With Data Pruning

Robert D. Mullins, Nicolas Papernot, R. Mullins, 2022, ArXiv.