T. Matsuoka

A novel dynamically programmable arithmetic array using code division multiple access bus

Kenji Taniguchi, R. Yoshimura, Boon-Keat Tan, 2001, ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483).

A 1.0 V, 2.5 mW, transformer noise-canceling UWB CMOS LNA

K. Taniguchi, T. Matsuoka, T. Kihara, 2008, 2008 IEEE Radio Frequency Integrated Circuits Symposium.

A 0.5 V area-efficient transformer folded-cascode low-noise amplifier in 90 nm CMOS

Hae-Ju Park, K. Taniguchi, T. Matsuoka, 2008, 2008 IEEE International Conference on Integrated Circuit Design and Technology and Tutorial.

Ultralow-power temperature-insensitive current reference circuit

K. Taniguchi, Y. Amemiya, T. Matsuoka, 2005, IEEE Sensors, 2005..

Novel bulk dynamic threshold voltage MOSFET (B-DTMOS) with advanced isolation (SITOS) and gate to shallow-well contact (SSS-C) processes for ultra low power dual gate CMOS

T. Matsuoka, T. Fukushima, S. Kakimoto, 1996, International Electron Devices Meeting. Technical Digest.