G. Fraidy Bouesse

DPA on quasi delay insensitive asynchronous circuits: formalization and improvement

Marc Renaudin, Fabien Germain, G. Fraidy Bouesse, 2005, Design, Automation and Test in Europe.

Improving DPA Resistance of Quasi Delay Insensitive Circuits Using Randomly Time-shifted Acknowledgment Signals

Gilles Sicard, Marc Renaudin, G. Fraidy Bouesse, 2005, VLSI-SoC.

Statistic Implementation of QDI Asynchronous Primitives

Gilles Sicard, Philippe Maurine, Marc Renaudin, 2003, PATMOS.

High security smartcards

Marc Renaudin, Fabien Germain, Laurent Sourgen, 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

Path Swapping Method to Improve DPA Resistance of Quasi Delay Insensitive Asynchronous Circuits

Gilles Sicard, Marc Renaudin, G. Fraidy Bouesse, 2006, CHES.