Vasantha Moodabettu Harishchandra

An energy-efficient fault-aware core mapping in mesh-based network on chip systems

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, 2017, J. Netw. Comput. Appl..

Hardware implementation of fault tolerance NoC core mapping

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, 2018, Telecommun. Syst..

High-performance and energy-efficient fault-tolerance core mapping in NoC

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, 2017, Sustain. Comput. Informatics Syst..

Energy-Aware and Reliability-Aware Mapping for NoC-Based Architectures

Naresh Kumar Reddy Beechu, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, 2018, Wirel. Pers. Commun..

Ultra-low voltage, power efficient continuous-time filters in 180 nm CMOS technology

Tonse Laxminidhi, Vasantha Moodabettu Harishchandra, S. Rekha, 2019, IET Circuits Devices Syst..

6.25 GHz, 1 mV input resolution auxiliary circuit assisted comparator in 65 nm CMOS process

Edoardo Bonizzoni, Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, 2020, IET Circuits Devices Syst..

Self Timed SRAM Array with Enhanced low Voltage Read and Write Capability

Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, Prasad Vernekar, 2019, 2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI).

High Performance Sense Amplifier Based Flip Flop for Driver Applications

Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, D Anoop, 2017, iNIS.

System level fault-tolerance core mapping and FPGA-based verification of NoC

Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, Naresh Kumar Reddy Becchu, 2017, Microelectron. J..

Process Corner Calibration for Standard Cell Based Flash ADC

Vasantha Moodabettu Harishchandra, Nithin Kumar Yernad Balachandra, K. SiddharthR., 2019, iSES.