Gordon P. Pollack

A model-based approach for process design and its application to the titanium salicide process

S. Rao, Sharad Saxena, Jorge Kittl, 1998 .

Single-transist latch in SOI MOSFET's

Gordon P. Pollack, C.-E.D. Chen, Mishel Matloubian, 1988 .

A 1-M bit SRAM on SIMOX material

R. Rajgopal, Gordon P. Pollack, H. Lu, 1993, Proceedings of 1993 IEEE International SOI Conference.

A 4Mb DRAM with cross point trench transistor cell

Sanjay K. Banerjee, Bao Tran, James D. Gallia, 1986, 1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

TITE RAM: A NEW SOI DRAM GAIN CELL FOR MBIT DRAM's.

Ashwin H. Shah, Hisashi Shichijo, William F. Richardson, 1984 .

Process Modeling and Integration of The Salicide Process Module for Sub-Half Micron Technology.

Jorge Kittl, P. P. Apte, Douglas A. Prinslow, 1995 .

Modeling of the subthreshold characteristics of SOI MOSFETs with floating body

Gordon P. Pollack, Mishel Matloubian, R. Sundaresan, 1990 .

A 4-Mbit DRAM with trench-transistor cell

H. E. Davis, Ashwin H. Shah, Hisashi Shichijo, 1986 .