Kunihiko Iizuka

发表

A 100 MS/s 4 MHz Bandwidth 70 dB SNR $\Delta \Sigma$ ADC in 90 nm CMOS

Yoshihisa Fujimoto, Pascal Lo Ré, Yusuke Kanazawa, 2009, IEEE Journal of Solid-State Circuits.

Special section on VLSI design technology in the sub-100 nm era

Makoto Nagata, Akira Matsuzawa, Mototsugu Hamada, 2006 .

Neural Pattern Recognition on Multichannel Input Representation

Kunihiko Iizuka, K. Iizuka, 1993 .

97-mW 8-Phase CMOS VCO and Dividers for a 134-GHz PLL Synthesizer

Minoru Fujishima, Kunihiko Iizuka, Takeshi Mitsunaka, 2015, IEICE Trans. Electron..

Dynamically Adaptable CMOS Winner-Take-All Neural Network

Masayuki Miyamoto, Kunihiko Iizuka, Hirofumi Matsui, 1996, NIPS.

Comparative performance measures of fuzzy ARTMAP, learned vector quantization, and back propagation for handwritten character recognition

Stephen Grossberg, Gail A. Carpenter, Kunihiko Iizuka, 1992, [Proceedings 1992] IJCNN International Joint Conference on Neural Networks.

Capacitively Coupled Non-Contact Probing Circuits for Membrane-Based Wafer-Level Simultaneous Testing

Takayasu Sakurai, Gil-Su Kim, Satoshi Sasaki, 2010, IEEE Journal of Solid-State Circuits.

CMOS Biosensor IC Focusing on Dielectric Relaxations of Biological Water With 120 and 60 GHz Oscillator Arrays

Minoru Fujishima, Akira Saito, Yuichi Ogawa, 2016, IEEE Journal of Solid-State Circuits.

A Digital TV Receiver RF and BB Chipset with Adaptive Bias-Current Control for Mobile Applications

Atsushi Sakai, Akira Saito, Hiroshi Kawamura, 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

Capacitively Coupled Non-Contact Probing Circuits for Membrane-Based Wafer-Level Simultaneous Testing

Takayasu Sakurai, Gil-Su Kim, Satoshi Sasaki, 2011, IEEE J. Solid State Circuits.

Foreword

Kunihiko Iizuka, 2007, IEICE Trans. Electron..

28.3 CMOS biosensor IC focusing on dielectric relaxations of biological water with 120GHz and 60GHz oscillator arrays

Minoru Fujishima, Akira Saito, Yuichi Ogawa, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).

Pager Service : Its Features and Possibilities of Communication

Kunihiko Iizuka, 1999 .

Embedded Anti-Aliasing in Switched-Capacitor Ladder Filters with Variable Gain and Offset Compensation

Masayuki Miyamoto, Kunihiko Iizuka, D. Senderowicz, 2001 .

A high OIP3 quadrature mixer using cross-coupled transconductor

Kunihiko Iizuka, Masato Koutani, 2005, Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005..

Embedded anti-aliasing in switched-capacitor ladder filters

Masayuki Miyamoto, Kunihiko Iizuka, D. Senderowicz, 2001, Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).

A parallel analog intelligent vision sensor with a variable receptive field

Tetsuya Yagi, Kunihiko Iizuka, Seiji Kameda, 1999, Systems and Computers in Japan.

An Analog Front-End for a Multifunction Sensor Employing a Weak-Inversion Biasing Technique With 26 nVrms, 25 aCrms, and 19 fArms Input-Referred Noise

Kunihiko Iizuka, Masahiko Maruyama, Shigenari Taguchi, 2016, IEEE Journal of Solid-State Circuits.

8-GHz Locking Range and 0.4-pJ Low-Energy Differential Dual-Modulus 10/11 Prescaler

Minoru Fujishima, Kunihiko Iizuka, Takeshi Mitsunaka, 2014, IEICE Trans. Electron..

A 24-bit multi-functional sensor analog front end employing low noise biasing technique with 8.2nV/√Hz input referred noise

Kunihiko Iizuka, Masahiko Maruyama, Shigenari Taguchi, 2015, 2015 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Fast Automatic Tuning of Channel Selection Filters Based on Phase Delay Calibration

Kunihiko Iizuka, Koutani Kagoshima, Shuichi Kawama, 2006, IEEE Custom Integrated Circuits Conference 2006.

A parallel analog intelligent vision sensor with a variable receptive field

Tetsuya Yagi, Kunihiko Iizuka, Seiji Kameda, 1999, Systems and Computers in Japan.

Design of Fourth-Order Continuous-Time Bandpass ΔΣAD Modulator for RF Sampling

Nobukazu Takai, Haruo Kobayashi, Haijun Lin, 2010 .

Data-Converter Techniques

Kunihiko Iizuka, Michael Flynn, 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

ADC in 90 nm CMOS

Yoshihisa Fujimoto, Yusuke Kanazawa, Kunihiko Iizuka, 2009 .

ART : Neural Network for Real Time Learning

Kunihiko Iizuka, K. Iizuka, 1997 .

9dB NF and +11dBm OIP3 CMOS Single Conversion Front-End for a Satellite Low-Noise Block Down-Converter

Minoru Fujishima, Kunihiko Iizuka, Takeshi Mitsunaka, 2014, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

RF Variable-Gain Amplifiers and AGC Loops for Digital TV Receivers

Akira Matsuzawa, Masayuki Miyamoto, Hiroshi Kawamura, 2008, IEICE Trans. Electron..

4 GHz locking range and 0.19 pJ low-energy differential dual-modulus 10/11 prescaler

Minoru Fujishima, Kunihiko Iizuka, Takeshi Mitsunaka, 2012, 2012 IEEE Asian Solid State Circuits Conference (A-SSCC).

37-mW CMOS voltage-controlled oscillators and dividers for 134-GHz phase-locked loop synthesizer

Minoru Fujishima, Kunihiko Iizuka, Takeshi Mitsunaka, 2014, 2014 9th European Microwave Integrated Circuit Conference.

The effect of supply voltage reduction to 5.8-GHz differential dual-modulus prescaler

Minoru Fujishima, Kunihiko Iizuka, Takeshi Mitsunaka, 2013, 2013 IEEE International Meeting for Future of Electron Devices, Kansai.