Stephan Kassenetter

Bitline-capacitance-cancelation sensing scheme with 11ns read latency and maximum read throughput of 2.9GB/s in 65nm embedded flash for automotive

Doris Schmitt-Landsiedel, Thomas Kern, Ulrich Backhausen, 2012, 2012 IEEE International Solid-State Circuits Conference.

Time-differential sense amplifier for sub-80mV bitline voltage embedded STT-MRAM in 40nm CMOS

Doris Schmitt-Landsiedel, Thomas Kern, Robert Allinger, 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.