S. W. Tarasewicz

A high voltage UMOS transistor

C.A.T. Salama, S. W. Tarasewicz, 1981 .

An assessment of the state-of-the-art 0.5 /spl mu/m bulk CMOS technology for RF applications

S. P. Voinigescu, S. W. Tarasewicz, T. MacElwee, 1995, Proceedings of International Electron Devices Meeting.

A simple GaAs MESFET model for circuit simulation reflecting the dependence on device geometry and process

S. W. Tarasewicz, 1988, Proceedings of the IEEE 1988 Custom Integrated Circuits Conference.

Development of the test insert generating expert routine (TIGER) for BiCMOS technologies

S. W. Tarasewicz, R. A. Horner, 1994, Proceedings of 1994 IEEE International Conference on Microelectronic Test Structures.

Transconductance degradation in VVMOS power transistors due to thermal and field effects

C.A.T. Salama, S. W. Tarasewicz, C. Salama, 1982 .

MISNAN-a physically based continuous MOSFET model for CAD applications

A. R. Boothroyd, Stan W. Tarasewicz, Cezary Slaby, 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Threshold voltage characteristics of ion-implanted depletion MOSFETs

S. W. Tarasewicz, C. Salama, 1988 .

Theory of the surface depletion region for semiconductors with linearly graded impurity profiles

S. W. Tarasewicz, C. Salama, 1984 .