Tiankuan Liu

发表

Design and Verification of an FPGA-based Bit Error Rate Tester

Futian Liang, Annie Xiang, D Gong, 2012 .

A Low-Power, Low-Latency, Dual-Channel Serializer ASIC for Detector Front-End Readout

Guangming Huang, Tiankuan Liu, Ping-Kun Teng, 2017 .

A gigabit transceiver for the ATLAS inner tracker pixel detector readout upgrade

Paul Leroux, Guangming Huang, Tiankuan Liu, 2019, Journal of Instrumentation.

ASIC developments for high speed serial data transmission in particle physics experiments

D Gong, Suen Hou, Tiankuan Liu, 2012 .

The Design of a High Speed Low Power Phase Locked Loop

Suen Hou, C. Liu, Tiankuan Liu, 2009 .

1.28 and 5.12 Gbps multi-channel twinax cable receiver ASICs for the ATLAS Inner Tracker Pixel Detector upgrade

Chufeng Chen, Suen Hou, Tiankuan Liu, 2020, 2008.09738.

High-Speed Serial Optical Link Test Bench Using FPGA with Embedded Transceivers

D Gong, Suen Hou, C. Liu, 2009 .

Low-latency and low-overhead encoder ASIC in the ATLAS LAr calorimeter trigger upgrade

Xiaoting Li, D Gong, Suen Hou, 2017 .

LOCx2, a low-latency, low-overhead, 2 × 5.12-Gbps transmitter ASIC for the ATLAS Liquid Argon Calorimeter trigger upgrade

Guangming Huang, C. Liu, Tiankuan Liu, 2016 .