Slo-Li Chu

发表

DynaPack: A Dynamic Scheduling Hardware Mechanism for a VLIW Processor

Slo-Li Chu, Geng-Siao Li, Ren-Quan Liu, 2012 .

Efficient rendering and cache replacement mechanisms for hierarchical tiling in mobile GPUs

Slo-Li Chu, Chih-Chieh Hsiao, Shang-Shun Dai, 2012, 2012 IEEE Global High Tech Congress on Electronics.

User adjustable process scheduling mechanism for a multiprocessor embedded system

Slo-Li Chu, Chih-Chieh Hsiao, Pin-Hua Chiu, 2006 .

Trend Training Based RNN for Human Induced Pluripotent Stem Cell Reprogramming Prediction Using Time-Lapse Microscopy Images

Hideo Yokota, Ming-Dar Tsai, Slo-Li Chu, 2020, 2020 IEEE 20th International Conference on Bioinformatics and Bioengineering (BIBE).

SAGE: an automatic analyzing system for a new high-performance SoC architecture--processor-in-memory

Tsung-Chuan Huang, Slo-Li Chu, S. Chu, 2004, J. Syst. Archit..

Slo-Li Chu, Geng-Siao Lee, Yan-Wun Peng, 2012, 2012 Fifth International Symposium on Parallel Architectures, Algorithms and Programming.

Speedup Resilience: A Practical Metric to Explore the Performance Boundary of Multicore Architectures

Slo-Li Chu, Shiue-Ru Chen, 2011 .

Energy-aware hybrid precision selection framework for mobile GPUs

Chen-Yu Chen, Slo-Li Chu, Chih-Chieh Hsiao, 2013, Comput. Graph..

Optimising space exploration of OpenCL for GPGPUs

Slo-Li Chu, Chih-Chieh Hsiao, 2014, Int. J. Comput. Sci. Eng..

Design a Novel Memory Network for Processor-in-Memory Architectures

Slo-Li Chu, Ming-Han Liu, Wen-Chih Ho, 2017, 2017 13th International Conference on Semantics, Knowledge and Grids (SKG).

The Comparisons of OpenCL and OpenMP Computing Paradigm

Slo-Li Chu, Chih-Chieh Hsiao, 2014 .

Improving workload balance and code optimization in processor-in-memory systems

Tsung-Chuan Huang, Slo-Li Chu, Lan-Chi Lee, 2001, Proceedings. Eighth International Conference on Parallel and Distributed Systems. ICPADS 2001.

An Adaptive Thread Scheduling Mechanism With Low-Power Register File for Mobile GPUs

Slo-Li Chu, Chih-Chieh Hsiao, Chiu-Cheng Hsieh, 2014, IEEE Transactions on Multimedia.

Design a Parallelizing System to Fully Utilize Processing Units in the Chip Multi-Processor System

Slo-Li Chu, 2008 .

OpenCL: Make Ubiquitous Supercomputing Possible

Slo-Li Chu, Chih-Chieh Hsiao, 2010, 2010 IEEE 12th International Conference on High Performance Computing and Communications (HPCC).

Critical Block Scheduling: A Thread-Level Parallelizing Mechanism for a Heterogeneous Chip Multiprocessor Architecture

Slo-Li Chu, S. Chu, 2007, LCPC.

An Energy-Efficient Unified Register File for Mobile GPUs

Slo-Li Chu, Chih-Chieh Hsiao, Chiu-Cheng Hsieh, 2011, 2011 IFIP 9th International Conference on Embedded and Ubiquitous Computing.

A Novel Training Mechanism for Extending Convolutional Neural Network

Slo-Li Chu, Cheng-Hsien Tsai, 2020, ICMLC.

Demand-driven register file for multithreaded mobile GPUs

Slo-Li Chu, Chih-Chieh Hsiao, Chiu-Cheng Hsieh, 2012, IEICE Electron. Express.

Optimizing Techniques for OpenCL Programs on Heterogeneous Platforms

Slo-Li Chu, Chih-Chieh Hsiao, 2012, Int. J. Grid High Perform. Comput..

A Hierarchical Triangle-Level Culling Technique for Tile-Based Rendering

Slo-Li Chu, Chih-Chieh Hsiao, 2012, 2012 Fifth International Symposium on Parallel Architectures, Algorithms and Programming.

Camellia: A Novel High Performance On-Chip Network for Multicore Architectures

Ching-Jung Chen, Slo-Li Chu, Ching-Chung Chen, 2015, 2015 11th International Conference on Semantics, Knowledge and Grids (SKG).

Human Induced Pluripotent Stem Cell Reprogramming Prediction in Microscopy Images using LSTM based RNN

Hideo Yokota, Ming-Dar Tsai, Slo-Li Chu, 2019, 2019 41st Annual International Conference of the IEEE Engineering in Medicine and Biology Society (EMBC).

A new analyzing approach for intelligent memory systems

Tsung-Chuan Huang, Slo-Li Chu, 2001, Computers and Their Applications.

Program-based dynamic precision selection framework with a dual-mode unified shader for mobile GPUs

Chen-Yu Chen, Slo-Li Chu, Chih-Chieh Hsiao, 2013, Comput. Electr. Eng..

COSPIM: a program optimization system for tightly-coupled heterogeneous environments

Slo-Li Chu, S. Chu, 2006 .

Design a Fully MIPS32 ISA Processor with Corresponding Verification Environment

Slo-Li Chu, Geng-Siao Li, Chih-Nan Hsu, 2009 .

MediaMem: A dynamically adjustable memory subsystem for high-bandwidth required multimedia SoC systems

Slo-Li Chu, Hsiao-Wen Yang, Min-Jen Lo, 2008, 2008 13th Asia-Pacific Computer Systems Architecture Conference.

Avalon: A Quad-Issue MIPS32 VLIW Processor with Dynamic Scheduling Mechanism

Slo-Li Chu, Geng-Siao Li, Ren-Quan Liu, 2012 .

Toward to Utilize the Heterogeneous Multiple Processors of the Chip Multiprocessor Architecture

Slo-Li Chu, S. Chu, 2007, EUC.

POERS: a performance-oriented energy reduction scheduling technique for a high-performance MPSoC architecture

Slo-Li Chu, 2005, 11th International Conference on Parallel and Distributed Systems (ICPADS'05).

Design a Hardware Mechanism to Utilize Multiprocessors on a Uni-processor Operating System

Slo-Li Chu, Chih-Chieh Hsiao, Pin-Hua Chiu, 2009, ICA3PP.

An Energy-Efficient demand-Driven Register File for Mobile GPUs

Slo-Li Chu, Chih-Chieh Hsiao, Chiu-Cheng Hsieh, 2014, J. Circuits Syst. Comput..

Design a High-Performance Memory Controller for a Multimedia SOC

Slo-Li Chu, Min-Jen Lo, 2012 .

Improving workload balance and code optimization on processor-in-memory systems

Tsung-Chuan Huang, Slo-Li Chu, Lan-Chi Lee, 2004, J. Syst. Softw..

Prediction for Morphology and States of Stem Cell Colonies using a LSTM Network with Progressive Training Microscopy Images

Hideo Yokota, Ming-Dar Tsai, Slo-Li Chu, 2020, 2020 42nd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC).

CNN Based iPS Cell Formation Stage Classifier for Human iPS Cell Growth Status Prediction Using Time-lapse Microscopy Images

Hideo Yokota, Ming-Dar Tsai, Slo-Li Chu, 2020, 2020 IEEE 20th International Conference on Bioinformatics and Bioengineering (BIBE).

SAGE: A New Analysis and Optimization System for FlexRAM Architecture

Tsung-Chuan Huang, Slo-Li Chu, 2000, Intelligent Memory Systems.

Golden-Finger and Back-Door: Two HW/SW Mechanisms for Accelerating Multicore Computer Systems

Slo-Li Chu, 2012 .

Demand look-ahead memory access scheduling for 3D graphics processing units

Slo-Li Chu, Chih-Chieh Hsiao, Min-Jen Lo, 2013, Multimedia Tools and Applications.

Novel Memory Access Scheduling Algorithms for a Surveillance System

Slo-Li Chu, Chung Li, Min-Jen Lo, 2013 .

A Comprehensive Statement-Based Analysis System for Tightly-Coupled Heterogeneous Environments

Tsung-Chuan Huang, Slo-Li Chu, 2001, ISCA PDCS.

SBATCH: An Integrated Statement-Based Parallelizing Compiler for Tightly-Coupled Heterogeneous Environments

Slo-Li Chu, 2004 .

A Dual-Mode Unified Shader with Frame-Based Dynamic Precision Adjustment for Mobile GPUs

Chen-Yu Chen, Slo-Li Chu, Chih-Chieh Hsiao, 2011, 2011 IFIP 9th International Conference on Embedded and Ubiquitous Computing.

Caliburn: a MIPS32 VLIW Processor with Hardware Instruction Morphing Mechanism

Slo-Li Chu, Geng-Siao Li, Ren-Quan Liu, 2013 .

PSS: a novel statement scheduling mechanism for a high-performance SoC architecture

Slo-Li Chu, S. Chu, 2004, Proceedings. Tenth International Conference on Parallel and Distributed Systems, 2004. ICPADS 2004..

Improving the Performance of Collective Communication for the On-Chip Network

Slo-Li Chu, Wen-Chih Ho, Yi-Jie Jiang, 2019, PAAP.

Content-aware smart remote control for Android-based TV

Yi-Hsuan Hung, Cheng-Liang Lin, Slo-Li Chu, 2012, 2012 IEEE International Conference on Consumer Electronics (ICCE).

Design a Low-Power Scheduling Mechanism for a Multicore Android System

Slo-Li Chu, Shiue-Ru Chen, Sheng-Fu Weng, 2012, 2012 Fifth International Symposium on Parallel Architectures, Algorithms and Programming.

An Energy Reduction Scheduling Mechanism for a High-Performance SoC Architecture

Slo-Li Chu, S. Chu, 2005, EUC.

MediaMem: An ESL Implementation of a Memory Subsystem for High-Bandwidth Required Multimedia SoC Systems

Slo-Li Chu, Yen-Hsiang Huang, Min-Jen Lo, 2009 .

Improving Arbitration and Buffer Management Techniques for Self Similar Cubic Network

Ching-Jung Chen, Slo-Li Chu, Ming-Han Liu, 2017, 2017 13th International Conference on Semantics, Knowledge and Grids (SKG).

A statement based parallelizing framework for processor-in-memory architectures

Tsung-Chuan Huang, Slo-Li Chu, S. Chu, 2003, Inf. Process. Lett..

CFSM: a novel frame analyzing mechanism for real-time face recognition system on the embedded system

Slo-Li Chu, Chien-Fang Chen, Yu-Chen Zheng, 2021, Multimedia Tools and Applications.